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feat(native): port Verilog extractor to Rust #570

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feat(native): port Verilog extractor to Rust

feat(native): port Verilog extractor to Rust #570

Triggered via pull request May 14, 2026 10:49
@carlos-almcarlos-alm
synchronize #1107
feat/1071-verilog-rust-extractor
Status Failure
Total duration 4m 18s
Artifacts 5

build-native.yml

on: pull_request
Matrix: build
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1 error and 1 notice
Build aarch64-apple-darwin
Process completed with exit code 1.
Build x86_64-pc-windows-msvc
NOTICE: windows-2025 requests are being redirected to windows-2025-vs2026 by May 12, 2026

Artifacts

Produced during runtime
Name Size Digest
native-darwin-x64
10.6 MB
sha256:3881d5277c62eea5c6bbdfd6a30a08a55e7601ad7bb70ca5f1b36fab29b458f6
native-linux-arm64
10.7 MB
sha256:03096b19f2e61f1e5896c8160dd91772be17dc49d76bc07288c7f6d976e38c93
native-linux-x64
10.8 MB
sha256:38ab8b30077a35944aaf96e23e21133f6841d5a5af35a3ea970a7d4f32fc08c6
native-linux-x64-musl
10.9 MB
sha256:ec4e39651b19755810d04331224726478e0d115cc963b06b99818a32339bdd6e
native-win32-x64
10.3 MB
sha256:ab4b868ef32a50a871406f673a474adbfb405f99317298f2b5f0706ac0b07f02