Skip to content

Commit 5d52ce9

Browse files
replaced by correct mapping
1 parent f9ae0cb commit 5d52ce9

2 files changed

Lines changed: 12 additions & 24 deletions

File tree

src/python/custom_pathsim_blocks.py

Lines changed: 0 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,6 @@
55

66

77
class Process(ODE):
8-
name_to_output_port = {"inv": 0, "mass_flow_rate": 1}
98
_port_map_out = {"inv": 0, "mass_flow_rate": 1}
109

1110
def __init__(self, residence_time=0, initial_value=0, source_term=0):
@@ -48,7 +47,6 @@ def update(self, t):
4847

4948

5049
class Splitter2(Splitter):
51-
name_to_output_port = {"source1": 0, "source2": 1}
5250
_port_map_out = {"source1": 0, "source2": 1}
5351

5452
def __init__(self, f1=0.5, f2=0.5):
@@ -59,7 +57,6 @@ def __init__(self, f1=0.5, f2=0.5):
5957

6058

6159
class Splitter3(Splitter):
62-
name_to_output_port = {"source1": 0, "source2": 1, "source3": 2}
6360
_port_map_out = {"source1": 0, "source2": 1, "source3": 2}
6461

6562
def __init__(self, f1=1 / 3, f2=1 / 3, f3=1 / 3):
@@ -118,17 +115,6 @@ class Bubbler(Subsystem):
118115
n_soluble_vials: float
119116
n_insoluble_vials: float
120117

121-
name_to_input_port = {
122-
"sample_in_soluble": 0,
123-
"sample_in_insoluble": 1,
124-
}
125-
name_to_output_port = {
126-
"vial1": 0,
127-
"vial2": 1,
128-
"vial3": 2,
129-
"vial4": 3,
130-
"sample_out": 4,
131-
}
132118
_port_map_out = {
133119
"vial1": 0,
134120
"vial2": 1,
@@ -273,9 +259,6 @@ def create_reset_events(self) -> list[pathsim.blocks.Schedule]:
273259

274260

275261
class FestimWall(Block):
276-
name_to_output_port = {"flux_0": 0, "flux_L": 1}
277-
name_to_input_port = {"c_0": 0, "c_L": 1}
278-
279262
_port_map_out = {"flux_0": 0, "flux_L": 1}
280263
_port_map_in = {"c_0": 0, "c_L": 1}
281264

src/python/pathsim_utils.py

Lines changed: 12 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -347,9 +347,12 @@ def get_input_index(block: Block, edge: dict, block_to_input_index: dict) -> int
347347
Returns:
348348
The input index for the block.
349349
"""
350-
if hasattr(block, "name_to_input_port"):
351-
return block.name_to_input_port[edge["targetHandle"]]
352-
elif isinstance(block, Function):
350+
351+
if edge["targetHandle"] is not None:
352+
if block._port_map_in:
353+
return block._port_map_in[edge["targetHandle"]]
354+
355+
if isinstance(block, Function):
353356
return int(edge["targetHandle"].replace("target-", ""))
354357
else:
355358
# make sure that the target block has only one input port (ie. that targetHandle is None)
@@ -372,9 +375,11 @@ def get_output_index(block: Block, edge: dict) -> int:
372375
Returns:
373376
The output index for the block.
374377
"""
375-
if hasattr(block, "name_to_output_port"):
376-
return block.name_to_output_port[edge["sourceHandle"]]
377-
elif isinstance(block, Splitter):
378+
if edge["sourceHandle"] is not None:
379+
if block._port_map_out:
380+
return block._port_map_out[edge["sourceHandle"]]
381+
382+
if isinstance(block, Splitter):
378383
# Splitter outputs are always in order, so we can use the handle directly
379384
assert edge["sourceHandle"], edge
380385
output_index = int(edge["sourceHandle"].replace("source", "")) - 1
@@ -428,7 +433,7 @@ def make_connections(nodes, edges, blocks) -> list[Connection]:
428433
if edge["sourceHandle"]:
429434
label += f" ({edge['sourceHandle']})"
430435
target_block.labels.append(label)
431-
436+
print(f"Connecting {source_block.id} output {output_index} to {target_block.id} input {input_index}")
432437
connection = Connection(
433438
source_block[output_index],
434439
target_block[input_index],

0 commit comments

Comments
 (0)