|
| 1 | +/* |
| 2 | + * Copyright (c) The mldsa-native project authors |
| 3 | + * SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT |
| 4 | + */ |
| 5 | + |
| 6 | +/* References |
| 7 | + * ========== |
| 8 | + * |
| 9 | + * - [REF_AVX2] |
| 10 | + * CRYSTALS-Dilithium optimized AVX2 implementation |
| 11 | + * Bai, Ducas, Kiltz, Lepoint, Lyubashevsky, Schwabe, Seiler, Stehlé |
| 12 | + * https://github.com/pq-crystals/dilithium/tree/master/avx2 |
| 13 | + */ |
| 14 | + |
| 15 | +/* |
| 16 | + * This file is derived from the public domain |
| 17 | + * AVX2 Dilithium implementation @[REF_AVX2]. |
| 18 | + */ |
| 19 | + |
| 20 | +#include "../../../common.h" |
| 21 | + |
| 22 | +#if defined(MLD_ARITH_BACKEND_X86_64_DEFAULT) && \ |
| 23 | + !defined(MLD_CONFIG_MULTILEVEL_NO_SHARED) && \ |
| 24 | + (defined(MLD_CONFIG_MULTILEVEL_WITH_SHARED) || \ |
| 25 | + (MLD_CONFIG_PARAMETER_SET == 65 || MLD_CONFIG_PARAMETER_SET == 87)) |
| 26 | + |
| 27 | +#include <immintrin.h> |
| 28 | +#include "arith_native_x86_64.h" |
| 29 | + |
| 30 | +/* |
| 31 | + * Pack polynomial with coefficients in [0, 15] into bytes, |
| 32 | + * 2 nibbles per byte. For GAMMA2 = (Q-1)/32. |
| 33 | + * |
| 34 | + * MLDSA_POLYW1_PACKEDBYTES = 128 for ML-DSA-65/87. |
| 35 | + * 256 coefficients * 4 bits = 1024 bits = 128 bytes. |
| 36 | + * |
| 37 | + * Processes 64 coefficients (2 x 256-bit loads of 8 x int32) per iteration, |
| 38 | + * producing 32 bytes of output. |
| 39 | + */ |
| 40 | +void mld_polyw1_pack_32_avx2(uint8_t *r, const int32_t *a) |
| 41 | +{ |
| 42 | + unsigned int i; |
| 43 | + const __m256i shift = _mm256_set1_epi16((16 << 8) + 1); |
| 44 | + const __m256i shufbidx = |
| 45 | + _mm256_set_epi8(15, 14, 7, 6, 13, 12, 5, 4, 11, 10, 3, 2, 9, 8, 1, 0, 15, |
| 46 | + 14, 7, 6, 13, 12, 5, 4, 11, 10, 3, 2, 9, 8, 1, 0); |
| 47 | + |
| 48 | + for (i = 0; i < MLDSA_N / 64; ++i) |
| 49 | + { |
| 50 | + __m256i f0 = _mm256_load_si256((__m256i *)&a[64 * i + 0]); |
| 51 | + __m256i f1 = _mm256_load_si256((__m256i *)&a[64 * i + 8]); |
| 52 | + __m256i f2 = _mm256_load_si256((__m256i *)&a[64 * i + 16]); |
| 53 | + __m256i f3 = _mm256_load_si256((__m256i *)&a[64 * i + 24]); |
| 54 | + __m256i f4 = _mm256_load_si256((__m256i *)&a[64 * i + 32]); |
| 55 | + __m256i f5 = _mm256_load_si256((__m256i *)&a[64 * i + 40]); |
| 56 | + __m256i f6 = _mm256_load_si256((__m256i *)&a[64 * i + 48]); |
| 57 | + __m256i f7 = _mm256_load_si256((__m256i *)&a[64 * i + 56]); |
| 58 | + f0 = _mm256_packus_epi32(f0, f1); |
| 59 | + f1 = _mm256_packus_epi32(f2, f3); |
| 60 | + f2 = _mm256_packus_epi32(f4, f5); |
| 61 | + f3 = _mm256_packus_epi32(f6, f7); |
| 62 | + f0 = _mm256_packus_epi16(f0, f1); |
| 63 | + f1 = _mm256_packus_epi16(f2, f3); |
| 64 | + f0 = _mm256_maddubs_epi16(f0, shift); |
| 65 | + f1 = _mm256_maddubs_epi16(f1, shift); |
| 66 | + f0 = _mm256_packus_epi16(f0, f1); |
| 67 | + f0 = _mm256_permute4x64_epi64(f0, 0xD8); |
| 68 | + f0 = _mm256_shuffle_epi8(f0, shufbidx); |
| 69 | + _mm256_storeu_si256((__m256i *)&r[32 * i], f0); |
| 70 | + } |
| 71 | +} |
| 72 | + |
| 73 | +#else /* MLD_ARITH_BACKEND_X86_64_DEFAULT && !MLD_CONFIG_MULTILEVEL_NO_SHARED \ |
| 74 | + && (MLD_CONFIG_MULTILEVEL_WITH_SHARED || MLD_CONFIG_PARAMETER_SET == \ |
| 75 | + 65 || MLD_CONFIG_PARAMETER_SET == 87) */ |
| 76 | + |
| 77 | +MLD_EMPTY_CU(avx2_polyw1_pack_32) |
| 78 | + |
| 79 | +#endif /* !(MLD_ARITH_BACKEND_X86_64_DEFAULT && \ |
| 80 | + !MLD_CONFIG_MULTILEVEL_NO_SHARED && \ |
| 81 | + (MLD_CONFIG_MULTILEVEL_WITH_SHARED || MLD_CONFIG_PARAMETER_SET == 65 \ |
| 82 | + || MLD_CONFIG_PARAMETER_SET == 87)) */ |
0 commit comments