Armv8.1-M: Add CFI directives for stack unwinding

Extend scripts/cfify with Armv8.1-M architecture support, handling
push/pop, vpush/vpop, sub/add sp, and bx lr.
Enable cfify for armv81m in scripts/autogen.

Also removes pushing/poping r3 and r12 in keccak_f1600_x4_mve_asm - they
do not have to be preserved according ot the AAPCS.

- Ports pq-code-package/mlkem-native#1558

Signed-off-by: Matthias J. Kannwischer <matthias@kannwischer.eu>

Author: mkannwischer

dev/fips202/armv81m/src/keccak_f1600_x4_mve.S

@@ -29,8 +29,8 @@
       c_parameter: const uint32_t *rc
       description: Keccak round constants in bit-interleaved form (24 pairs of 32-bit words)
   Stack:
-    bytes: 236
-    description: register preservation (44) + SIMD registers (64) + temporary storage (128)
+    bytes: 228
+    description: register preservation (36) + SIMD registers (64) + temporary storage (128)
 */
 
 #include "../../../../common.h"
@@ -431,7 +431,7 @@ qA20_l .req q2
 .global MLD_ASM_NAMESPACE(keccak_f1600_x4_mve_asm)
 MLD_ASM_FN_SYMBOL(keccak_f1600_x4_mve_asm)
 
-    push {r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
+    push {r4,r5,r6,r7,r8,r9,r10,r11,lr}
     vpush {d8-d15}
     sub sp, #8*16
 
@@ -1597,7 +1597,7 @@ keccak_f1600_x4_mve_asm_roundend:
     add sp, #8*16
 
     vpop {d8-d15}
-    ldmia.w sp!, {r3,r4,r5,r6,r7,r8,r9,r10,r11,r12, pc}
+    ldmia.w sp!, {r4,r5,r6,r7,r8,r9,r10,r11, pc}
 
 /****************** REGISTER DEALLOCATIONS *******************/
     .unreq qA00_h

mldsa/src/fips202/native/armv81m/src/keccak_f1600_x4_mve.S

@@ -29,8 +29,8 @@
       c_parameter: const uint32_t *rc
       description: Keccak round constants in bit-interleaved form (24 pairs of 32-bit words)
   Stack:
-    bytes: 236
-    description: register preservation (44) + SIMD registers (64) + temporary storage (128)
+    bytes: 228
+    description: register preservation (36) + SIMD registers (64) + temporary storage (128)
 */
 
 #include "../../../../common.h"
@@ -50,9 +50,30 @@
 .global MLD_ASM_NAMESPACE(keccak_f1600_x4_mve_asm)
 MLD_ASM_FN_SYMBOL(keccak_f1600_x4_mve_asm)
 
-        push.w	{r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, lr}
+        .cfi_startproc
+        push.w	{r4, r5, r6, r7, r8, r9, r10, r11, lr}
+        .cfi_adjust_cfa_offset 0x24
+        .cfi_rel_offset r4, 0x0
+        .cfi_rel_offset r5, 0x4
+        .cfi_rel_offset r6, 0x8
+        .cfi_rel_offset r7, 0xc
+        .cfi_rel_offset r8, 0x10
+        .cfi_rel_offset r9, 0x14
+        .cfi_rel_offset r10, 0x18
+        .cfi_rel_offset r11, 0x1c
+        .cfi_rel_offset lr, 0x20
         vpush	{d8, d9, d10, d11, d12, d13, d14, d15}
+        .cfi_adjust_cfa_offset 0x40
+        .cfi_rel_offset d8, 0x0
+        .cfi_rel_offset d9, 0x8
+        .cfi_rel_offset d10, 0x10
+        .cfi_rel_offset d11, 0x18
+        .cfi_rel_offset d12, 0x20
+        .cfi_rel_offset d13, 0x28
+        .cfi_rel_offset d14, 0x30
+        .cfi_rel_offset d15, 0x38
         sub	sp, #0x80
+        .cfi_adjust_cfa_offset 0x80
         mov	r6, r2
         mov.w	lr, #0x18
         mov	r2, r0
@@ -61,9 +82,9 @@ MLD_ASM_FN_SYMBOL(keccak_f1600_x4_mve_asm)
         vldrw.u32	q0, [r3]
         vldrw.u32	q1, [r2]
         vldrw.u32	q2, [r2, #32]
-        wls	lr, lr, keccak_f1600_x4_mve_asm_roundend @ imm = #0x8c0
+        wls	lr, lr, Lkeccak_f1600_x4_mve_asm_roundend @ imm = #0x8c0
 
-keccak_f1600_x4_mve_asm_roundstart:
+Lkeccak_f1600_x4_mve_asm_roundstart:
         vldrw.u32	q6, [r2, #112]
         veor	q7, q6, q2
         vldrw.u32	q2, [r2, #80]
@@ -624,13 +645,34 @@ keccak_f1600_x4_mve_asm_roundstart:
         veor	q0, q4, q6
         vstrw.32	q0, [r5]
 
-keccak_f1600_x4_mve_asm_roundend_pre:
-        le	lr, keccak_f1600_x4_mve_asm_roundstart @ imm = #-0x8c0
+Lkeccak_f1600_x4_mve_asm_roundend_pre:
+        le	lr, Lkeccak_f1600_x4_mve_asm_roundstart @ imm = #-0x8c0
 
-keccak_f1600_x4_mve_asm_roundend:
+Lkeccak_f1600_x4_mve_asm_roundend:
         add	sp, #0x80
+        .cfi_adjust_cfa_offset -0x80
         vpop	{d8, d9, d10, d11, d12, d13, d14, d15}
-        pop.w	{r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, pc}
+        .cfi_restore d8
+        .cfi_restore d9
+        .cfi_restore d10
+        .cfi_restore d11
+        .cfi_restore d12
+        .cfi_restore d13
+        .cfi_restore d14
+        .cfi_restore d15
+        .cfi_adjust_cfa_offset -0x40
+        pop.w	{r4, r5, r6, r7, r8, r9, r10, r11, pc}
+        .cfi_restore r4
+        .cfi_restore r5
+        .cfi_restore r6
+        .cfi_restore r7
+        .cfi_restore r8
+        .cfi_restore r9
+        .cfi_restore r10
+        .cfi_restore r11
+        .cfi_restore lr
+        .cfi_adjust_cfa_offset -0x24
+        .cfi_endproc
         nop
 
 MLD_ASM_FN_SIZE(keccak_f1600_x4_mve_asm)

scripts/autogen

@@ -2170,9 +2170,7 @@ def update_via_simpasm(
                 "-o",
                 tmp.name,
             ]
-            # TODO: Support CFI for Armv8.1-M
-            if arch != "armv81m":
-                cmd += ["--cfify"]
+            cmd += ["--cfify"]
             if cross_prefix is not None:
                 # Stick with llvm-objdump for disassembly
                 cmd += ["--cc", cross_prefix + "gcc"]

scripts/cfify

@@ -226,6 +226,179 @@ def add_cfi_directives(text, arch):
                 i += 1
                 continue
 
+        elif arch == "armv81m":
+            # Armv8.1-M callee-saved registers
+            armv81m_callee_saved_gprs = {
+                "r4",
+                "r5",
+                "r6",
+                "r7",
+                "r8",
+                "r9",
+                "r10",
+                "r11",
+                "lr",
+            }
+            armv81m_callee_saved_dregs = {
+                "d8",
+                "d9",
+                "d10",
+                "d11",
+                "d12",
+                "d13",
+                "d14",
+                "d15",
+            }
+            # Register aliases: numeric form -> canonical name
+            gpr_aliases = {"r14": "lr", "r15": "pc", "r13": "sp"}
+
+            def parse_reg(s):
+                """Parse a single register, returning (prefix, number) or None."""
+                s = s.strip().lower()
+                # Named aliases
+                if s in ("lr", "pc", "sp"):
+                    return s
+                m = re.match(r"([a-z]+)(\d+)$", s)
+                if not m:
+                    raise ValueError(f"Cannot parse register: {s}")
+                return gpr_aliases.get(s, s)
+
+            def expand_reg_range(token):
+                """Expand 'r4-r11' or 'd8-d15' into a list. Single regs returned as-is."""
+                m = re.match(r"^\s*([a-z]+)(\d+)\s*-\s*([a-z]+)(\d+)\s*$", token)
+                if m:
+                    prefix1, lo, prefix2, hi = (
+                        m.group(1),
+                        int(m.group(2)),
+                        m.group(3),
+                        int(m.group(4)),
+                    )
+                    if prefix1 != prefix2:
+                        raise ValueError(
+                            f"Mismatched register prefixes in range: {token}"
+                        )
+                    return [
+                        gpr_aliases.get(f"{prefix1}{n}", f"{prefix1}{n}")
+                        for n in range(lo, hi + 1)
+                    ]
+                return [parse_reg(token)]
+
+            def parse_reglist(reglist_str):
+                """Parse a register list string, expanding ranges and normalizing aliases."""
+                result = []
+                for token in reglist_str.split(","):
+                    result.extend(expand_reg_range(token))
+                return result
+
+            # push.w {reglist} / push {reglist}
+            match = re.match(r"(\s*)push(?:\.w)?\s*\{([^}]+)\}", line, re.IGNORECASE)
+            if match:
+                indent = match.group(1)
+                regs = parse_reglist(match.group(2))
+                total_size = 4 * len(regs)
+                result.append(line)
+                result.append(f"{indent}.cfi_adjust_cfa_offset {total_size:#x}")
+                for idx, reg in enumerate(regs):
+                    if reg in armv81m_callee_saved_gprs:
+                        offset = 4 * idx
+                        result.append(f"{indent}.cfi_rel_offset {reg}, {offset:#x}")
+                i += 1
+                continue
+
+            # vpush {d-regs}
+            match = re.match(r"(\s*)vpush\s*\{([^}]+)\}", line, re.IGNORECASE)
+            if match:
+                indent = match.group(1)
+                regs = parse_reglist(match.group(2))
+                total_size = 8 * len(regs)
+                result.append(line)
+                result.append(f"{indent}.cfi_adjust_cfa_offset {total_size:#x}")
+                for idx, reg in enumerate(regs):
+                    if reg in armv81m_callee_saved_dregs:
+                        offset = 8 * idx
+                        result.append(f"{indent}.cfi_rel_offset {reg}, {offset:#x}")
+                i += 1
+                continue
+
+            # vpop {d-regs}
+            match = re.match(r"(\s*)vpop\s*\{([^}]+)\}", line, re.IGNORECASE)
+            if match:
+                indent = match.group(1)
+                regs = parse_reglist(match.group(2))
+                total_size = 8 * len(regs)
+                result.append(line)
+                for reg in regs:
+                    if reg in armv81m_callee_saved_dregs:
+                        result.append(f"{indent}.cfi_restore {reg}")
+                result.append(f"{indent}.cfi_adjust_cfa_offset -{total_size:#x}")
+                i += 1
+                continue
+
+            # pop.w {reglist} / pop {reglist}
+            match = re.match(r"(\s*)pop(?:\.w)?\s*\{([^}]+)\}", line, re.IGNORECASE)
+            if match:
+                indent = match.group(1)
+                regs = parse_reglist(match.group(2))
+                total_size = 4 * len(regs)
+                has_pc = "pc" in regs
+                result.append(line)
+                for reg in regs:
+                    if reg in armv81m_callee_saved_gprs:
+                        result.append(f"{indent}.cfi_restore {reg}")
+                    elif reg == "pc":
+                        # pop into pc restores lr
+                        result.append(f"{indent}.cfi_restore lr")
+                result.append(f"{indent}.cfi_adjust_cfa_offset -{total_size:#x}")
+                if has_pc:
+                    result.append(f"{indent}.cfi_endproc")
+                i += 1
+                continue
+
+            # sub.w sp, #imm / sub sp, #imm / sub sp, sp, #imm
+            match = re.match(
+                r"(\s*)sub(?:\.w)?\s+sp,\s*(?:sp,\s*)?#(0x[0-9a-fA-F]+|\d+)",
+                line,
+                re.IGNORECASE,
+            )
+            if match:
+                indent, offset_str = match.groups()
+                offset = (
+                    int(offset_str, 16)
+                    if offset_str.lower().startswith("0x")
+                    else int(offset_str)
+                )
+                result.append(line)
+                result.append(f"{indent}.cfi_adjust_cfa_offset {offset:#x}")
+                i += 1
+                continue
+
+            # add.w sp, #imm / add sp, #imm / add sp, sp, #imm
+            match = re.match(
+                r"(\s*)add(?:\.w)?\s+sp,\s*(?:sp,\s*)?#(0x[0-9a-fA-F]+|\d+)",
+                line,
+                re.IGNORECASE,
+            )
+            if match:
+                indent, offset_str = match.groups()
+                offset = (
+                    int(offset_str, 16)
+                    if offset_str.lower().startswith("0x")
+                    else int(offset_str)
+                )
+                result.append(line)
+                result.append(f"{indent}.cfi_adjust_cfa_offset -{offset:#x}")
+                i += 1
+                continue
+
+            # bx lr — function return
+            match = re.match(r"(\s*)bx\s+lr\s*$", line, re.IGNORECASE)
+            if match:
+                indent = match.group(1)
+                result.append(line)
+                result.append(f"{indent}.cfi_endproc")
+                i += 1
+                continue
+
         result.append(line)
         i += 1
 
@@ -246,7 +419,7 @@ def main():
     )
     parser.add_argument(
         "--arch",
-        choices=["aarch64", "x86_64"],
+        choices=["aarch64", "x86_64", "armv81m"],
         default="aarch64",
         help="Target architecture (default: aarch64)",
     )