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| 1 | +/* |
| 2 | + * Copyright (c) The mldsa-native project authors |
| 3 | + * Copyright (c) The mlkem-native project authors |
| 4 | + * SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT |
| 5 | + */ |
| 6 | + |
| 7 | + |
| 8 | +/* |
| 9 | + * WARNING: This file is auto-derived from the mldsa-native source file |
| 10 | + * dev/aarch64_opt/src/rej_uniform_aarch64_asm.S using scripts/simpasm. Do not modify it directly. |
| 11 | + */ |
| 12 | + |
| 13 | +.text |
| 14 | +.balign 4 |
| 15 | +#ifdef __APPLE__ |
| 16 | +.global _PQCP_MLDSA_NATIVE_MLDSA44_rej_uniform_aarch64_asm |
| 17 | +_PQCP_MLDSA_NATIVE_MLDSA44_rej_uniform_aarch64_asm: |
| 18 | +#else |
| 19 | +.global PQCP_MLDSA_NATIVE_MLDSA44_rej_uniform_aarch64_asm |
| 20 | +PQCP_MLDSA_NATIVE_MLDSA44_rej_uniform_aarch64_asm: |
| 21 | +#endif |
| 22 | + |
| 23 | + .cfi_startproc |
| 24 | + sub sp, sp, #0x440 |
| 25 | + .cfi_adjust_cfa_offset 0x440 |
| 26 | + mov x7, #0x1 // =1 |
| 27 | + movk x7, #0x2, lsl #32 |
| 28 | + mov v31.d[0], x7 |
| 29 | + mov x7, #0x4 // =4 |
| 30 | + movk x7, #0x8, lsl #32 |
| 31 | + mov v31.d[1], x7 |
| 32 | + mov w7, #0xe001 // =57345 |
| 33 | + movk w7, #0x7f, lsl #16 |
| 34 | + dup v30.4s, w7 |
| 35 | + mov x8, sp |
| 36 | + mov x7, x8 |
| 37 | + mov x11, #0x0 // =0 |
| 38 | + eor v16.16b, v16.16b, v16.16b |
| 39 | + |
| 40 | +Lrej_uniform_initial_zero: |
| 41 | + str q16, [x7], #0x40 |
| 42 | + stur q16, [x7, #-0x30] |
| 43 | + stur q16, [x7, #-0x20] |
| 44 | + stur q16, [x7, #-0x10] |
| 45 | + add x11, x11, #0x10 |
| 46 | + cmp x11, #0x100 |
| 47 | + b.lt Lrej_uniform_initial_zero |
| 48 | + mov x7, x8 |
| 49 | + mov x9, #0x0 // =0 |
| 50 | + mov x4, #0x100 // =256 |
| 51 | + cmp x2, #0x30 |
| 52 | + b.lo Lrej_uniform_loop48_end |
| 53 | + |
| 54 | +Lrej_uniform_loop48: |
| 55 | + cmp x9, x4 |
| 56 | + b.hs Lrej_uniform_memory_copy |
| 57 | + sub x2, x2, #0x30 |
| 58 | + ld3 { v0.16b, v1.16b, v2.16b }, [x1], #48 |
| 59 | + movi v4.16b, #0x80 |
| 60 | + bic v2.16b, v2.16b, v4.16b |
| 61 | + zip1 v4.16b, v0.16b, v1.16b |
| 62 | + zip2 v5.16b, v0.16b, v1.16b |
| 63 | + ushll v6.8h, v2.8b, #0x0 |
| 64 | + ushll2 v7.8h, v2.16b, #0x0 |
| 65 | + zip1 v16.8h, v4.8h, v6.8h |
| 66 | + zip2 v17.8h, v4.8h, v6.8h |
| 67 | + zip1 v18.8h, v5.8h, v7.8h |
| 68 | + zip2 v19.8h, v5.8h, v7.8h |
| 69 | + cmhi v4.4s, v30.4s, v16.4s |
| 70 | + cmhi v5.4s, v30.4s, v17.4s |
| 71 | + cmhi v6.4s, v30.4s, v18.4s |
| 72 | + cmhi v7.4s, v30.4s, v19.4s |
| 73 | + and v4.16b, v4.16b, v31.16b |
| 74 | + and v5.16b, v5.16b, v31.16b |
| 75 | + and v6.16b, v6.16b, v31.16b |
| 76 | + and v7.16b, v7.16b, v31.16b |
| 77 | + uaddlv d20, v4.4s |
| 78 | + uaddlv d21, v5.4s |
| 79 | + uaddlv d22, v6.4s |
| 80 | + uaddlv d23, v7.4s |
| 81 | + fmov x12, d20 |
| 82 | + fmov x13, d21 |
| 83 | + fmov x14, d22 |
| 84 | + fmov x15, d23 |
| 85 | + ldr q24, [x3, x12, lsl #4] |
| 86 | + ldr q25, [x3, x13, lsl #4] |
| 87 | + ldr q26, [x3, x14, lsl #4] |
| 88 | + ldr q27, [x3, x15, lsl #4] |
| 89 | + cnt v4.16b, v4.16b |
| 90 | + cnt v5.16b, v5.16b |
| 91 | + cnt v6.16b, v6.16b |
| 92 | + cnt v7.16b, v7.16b |
| 93 | + uaddlv d20, v4.4s |
| 94 | + uaddlv d21, v5.4s |
| 95 | + uaddlv d22, v6.4s |
| 96 | + uaddlv d23, v7.4s |
| 97 | + fmov x12, d20 |
| 98 | + fmov x13, d21 |
| 99 | + fmov x14, d22 |
| 100 | + fmov x15, d23 |
| 101 | + tbl v16.16b, { v16.16b }, v24.16b |
| 102 | + tbl v17.16b, { v17.16b }, v25.16b |
| 103 | + tbl v18.16b, { v18.16b }, v26.16b |
| 104 | + tbl v19.16b, { v19.16b }, v27.16b |
| 105 | + st1 { v16.4s }, [x7] |
| 106 | + add x7, x7, x12, lsl #2 |
| 107 | + st1 { v17.4s }, [x7] |
| 108 | + add x7, x7, x13, lsl #2 |
| 109 | + st1 { v18.4s }, [x7] |
| 110 | + add x7, x7, x14, lsl #2 |
| 111 | + st1 { v19.4s }, [x7] |
| 112 | + add x7, x7, x15, lsl #2 |
| 113 | + add x12, x12, x13 |
| 114 | + add x14, x14, x15 |
| 115 | + add x9, x9, x12 |
| 116 | + add x9, x9, x14 |
| 117 | + cmp x2, #0x30 |
| 118 | + b.hs Lrej_uniform_loop48 |
| 119 | + |
| 120 | +Lrej_uniform_loop48_end: |
| 121 | + cmp x9, x4 |
| 122 | + b.hs Lrej_uniform_memory_copy |
| 123 | + cmp x2, #0x18 |
| 124 | + b.lo Lrej_uniform_memory_copy |
| 125 | + sub x2, x2, #0x18 |
| 126 | + ld3 { v0.8b, v1.8b, v2.8b }, [x1], #24 |
| 127 | + movi v4.16b, #0x80 |
| 128 | + bic v2.16b, v2.16b, v4.16b |
| 129 | + zip1 v4.16b, v0.16b, v1.16b |
| 130 | + ushll v6.8h, v2.8b, #0x0 |
| 131 | + zip1 v16.8h, v4.8h, v6.8h |
| 132 | + zip2 v17.8h, v4.8h, v6.8h |
| 133 | + cmhi v4.4s, v30.4s, v16.4s |
| 134 | + cmhi v5.4s, v30.4s, v17.4s |
| 135 | + and v4.16b, v4.16b, v31.16b |
| 136 | + and v5.16b, v5.16b, v31.16b |
| 137 | + uaddlv d20, v4.4s |
| 138 | + uaddlv d21, v5.4s |
| 139 | + fmov x12, d20 |
| 140 | + fmov x13, d21 |
| 141 | + ldr q24, [x3, x12, lsl #4] |
| 142 | + ldr q25, [x3, x13, lsl #4] |
| 143 | + cnt v4.16b, v4.16b |
| 144 | + cnt v5.16b, v5.16b |
| 145 | + uaddlv d20, v4.4s |
| 146 | + uaddlv d21, v5.4s |
| 147 | + fmov x12, d20 |
| 148 | + fmov x13, d21 |
| 149 | + tbl v16.16b, { v16.16b }, v24.16b |
| 150 | + tbl v17.16b, { v17.16b }, v25.16b |
| 151 | + st1 { v16.4s }, [x7] |
| 152 | + add x7, x7, x12, lsl #2 |
| 153 | + st1 { v17.4s }, [x7] |
| 154 | + add x7, x7, x13, lsl #2 |
| 155 | + add x9, x9, x12 |
| 156 | + add x9, x9, x13 |
| 157 | + |
| 158 | +Lrej_uniform_memory_copy: |
| 159 | + cmp x9, x4 |
| 160 | + csel x9, x9, x4, lo |
| 161 | + mov x11, #0x0 // =0 |
| 162 | + mov x7, x8 |
| 163 | + |
| 164 | +Lrej_uniform_final_copy: |
| 165 | + ldr q16, [x7], #0x40 |
| 166 | + ldur q17, [x7, #-0x30] |
| 167 | + ldur q18, [x7, #-0x20] |
| 168 | + ldur q19, [x7, #-0x10] |
| 169 | + str q16, [x0], #0x40 |
| 170 | + stur q17, [x0, #-0x30] |
| 171 | + stur q18, [x0, #-0x20] |
| 172 | + stur q19, [x0, #-0x10] |
| 173 | + add x11, x11, #0x10 |
| 174 | + cmp x11, #0x100 |
| 175 | + b.lt Lrej_uniform_final_copy |
| 176 | + mov x0, x9 |
| 177 | + b Lrej_uniform_return |
| 178 | + |
| 179 | +Lrej_uniform_return: |
| 180 | + add sp, sp, #0x440 |
| 181 | + .cfi_adjust_cfa_offset -0x440 |
| 182 | + ret |
| 183 | + .cfi_endproc |
| 184 | + |
| 185 | +#if defined(__ELF__) |
| 186 | +.section .note.GNU-stack,"",%progbits |
| 187 | +#endif |
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