CI: Add RISC-V runners to base CI (via RISE project)#1643
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hanno-becker merged 2 commits intomainfrom Apr 11, 2026
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scan-build and C90 builds seem very slow on riscv64 in the base CI. I will remove those |
Previously, -march=rv64gcv was unconditionally added for all riscv64 targets, causing compilation failures on RISC-V systems without the vector extension. Add host CPU and compiler feature detection for RVV, mirroring the existing pattern for x86_64 (AVX2/BMI2) and AArch64 (SHA3). The host detection parses the ISA string from /proc/cpuinfo to check for the 'v' extension. Also add riscv64 to the host_info make target. Signed-off-by: Matthias J. Kannwischer <matthias@zerorisc.com>
The RISE project now provides free RISC-V Github runners, see https://riseproject-dev.github.io/riscv-runner/ This commit adds them to the Quickcheck and Quickcheck ACVP jobs of the base CI. The C90 and scan-build jobs are intentionally not enabled on RISC-V as they are slow. We can't run the extended CI on RISC-V as those require nix which does not yet support RISC-V. Signed-off-by: Matthias J. Kannwischer <matthias@zerorisc.com>
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The RISE project now provides free RISV-V Github runners, see https://riseproject-dev.github.io/riscv-runner/
This commit adds them to the base CI.