CI: Add RISC-V runners to base CI (via RISE project)

.github/workflows/base.yml

@@ -34,6 +34,9 @@ jobs:
            name: 'aarch64'
          - runner: ubuntu-latest
            name: 'x86_64'
+         # via https://riseproject-dev.github.io/riscv-runner/
+         - runner: ubuntu-24.04-riscv
+           name: 'riscv'
          - runner: macos-latest
            name: 'macos (aarch64)'
          - runner: macos-15-intel
@@ -68,6 +71,9 @@ jobs:
            name: 'aarch64'
          - runner: ubuntu-latest
            name: 'x86_64'
+         # via https://riseproject-dev.github.io/riscv-runner/
+         - runner: ubuntu-24.04-riscv
+           name: 'riscv'
         acvp-version: [v1.1.0.39, v1.1.0.40, v1.1.0.41]
         exclude:
           - {external: true,

Makefile

@@ -270,6 +270,9 @@ ifeq ($(ARCH),x86_64)
 else ifeq ($(ARCH),aarch64)
 	@echo "=== AArch64 Feature Support ==="
 	@echo "SHA3: Host $(if $(filter 1,$(MK_HOST_SUPPORTS_SHA3)),✅,❌) Compiler $(if $(filter 1,$(MK_COMPILER_SUPPORTS_SHA3)),✅,❌)"
+else ifeq ($(ARCH),riscv64)
+	@echo "=== RISC-V 64-bit Feature Support ==="
+	@echo "RVV: Host $(if $(filter 1,$(MK_HOST_SUPPORTS_RVV)),✅,❌) Compiler $(if $(filter 1,$(MK_COMPILER_SUPPORTS_RVV)),✅,❌)"
 else
 	@echo "=== Architecture Not Supported ==="
 	@echo "No specific feature detection available for $(ARCH)"

test/mk/auto.mk

@@ -67,6 +67,14 @@ MK_COMPILER_SUPPORTS_SHA3 ?= $(shell echo 'int main() { __asm__("eor3 v0.16b, v1
 
 endif # aarch64 compiler detection
 
+# RISC-V 64-bit compiler feature detection
+ifeq ($(ARCH),riscv64)
+
+# Test RVV support using C with inline assembly
+MK_COMPILER_SUPPORTS_RVV ?= $(shell echo 'int main() { __asm__("vadd.vv v0, v1, v2"); return 0; }' | $(CC) -march=rv64gcv -x c - -c -o /dev/null 2>/dev/null && echo 1 || echo 0)
+
+endif # riscv64 compiler detection
+
 # Define HOST_PLATFORM if not already defined
 HOST_PLATFORM ?= $(shell uname -s)-$(shell uname -m)
 
@@ -124,6 +132,25 @@ endif # HOST_PLATFORM aarch64
 
 endif # aarch64
 
+# RISC-V 64-bit architecture detection
+ifeq ($(ARCH),riscv64)
+
+# Host CPU feature detection for RISC-V 64-bit
+ifeq ($(HOST_PLATFORM),Linux-riscv64)
+# Linux: Parse ISA string from /proc/cpuinfo
+# Format: rv64imafdcv_sscofpmf_... -- extract single-letter extensions
+# (before first '_') and check for 'v'
+MK_HOST_SUPPORTS_RVV := $(shell sed -n '/^isa/{s/.*rv64//;s/_.*//;p;q}' /proc/cpuinfo 2>/dev/null | grep -q v && echo 1 || echo 0)
+else ifneq ($(CROSS_PREFIX),)
+# Cross-compilation: assume all features are supported
+MK_HOST_SUPPORTS_RVV := 1
+else
+# Other platforms: assume no support
+MK_HOST_SUPPORTS_RVV := 0
+endif # HOST_PLATFORM riscv64
+
+endif # riscv64
+
 # Only apply CFLAGS modifications if AUTO=1
 ifeq ($(AUTO),1)
 
@@ -159,7 +186,11 @@ endif # aarch64_be
 # RISC-V 64-bit CFLAGS configuration
 ifeq ($(ARCH),riscv64)
 CFLAGS += -DMLK_FORCE_RISCV64
+
+# Add RVV flags only if both compiler and host support it
+ifeq ($(MK_COMPILER_SUPPORTS_RVV)$(MK_HOST_SUPPORTS_RVV),11)
 CFLAGS += -march=rv64gcv
+endif
 endif # riscv64
 
 # RISC-V 32-bit CFLAGS configuration