hv: riscv: Add riscv build skeleton and hello world binary

This commit adds riscv build skeleton and adds some dummy files that
prints out hello world.

To build riscv acrn.out/acrn.bin, simply:

make hypervisor \
    BOARD=<any existing board> \
    SCENARIO=<any existing scenario> \
    ARCH=riscv

We still need to specify board and scenario as those were required by
project level makefile.

Tracked-On: #8782
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>

Author: yfliuuu

hypervisor/arch/riscv/Makefile

@@ -0,0 +1,54 @@
+CROSS_COMPILE ?= riscv64-linux-gnu-
+
+CC      = $(CROSS_COMPILE)gcc
+AS      = $(CROSS_COMPILE)as
+AR      = $(CROSS_COMPILE)ar
+LD      = $(CROSS_COMPILE)ld
+OBJCOPY = $(CROSS_COMPILE)objcopy
+
+ARCH_LDSCRIPT_IN = arch/riscv/link_ram.ld.in
+
+CFLAGS +=
+
+ASFLAGS +=
+
+# g expands to i, m, a, f, d, zicsr and zifencei.
+# h for hypervisor extension
+RV_ISA += gh
+RV_ISA += zbb
+RV_ISA += zicbom
+
+ARCH_CFLAGS += -march=rv64$(subst $() $(),_,$(RV_ISA))
+ARCH_CFLAGS += -mabi=lp64d
+ARCH_CFLAGS += -mcmodel=medany
+
+ARCH_ASFLAGS += -march=rv64$(subst $() $(),_,$(RV_ISA))
+
+# HV host assembly sources
+HOST_S_SRCS += arch/riscv/dummy_entry.S
+
+# HV host C sources
+HOST_C_SRCS += arch/riscv/dummy.c
+
+# Virtual platform assembly sources
+VP_S_SRCS +=
+
+# Virtual platform C sources
+VP_C_SRCS += arch/riscv/guest/dummy_guest.c
+
+HOST_C_OBJS := $(patsubst %.c,$(HV_OBJDIR)/%.o,$(HOST_C_SRCS))
+HOST_S_OBJS := $(patsubst %.S,$(HV_OBJDIR)/%.o,$(HOST_S_SRCS))
+VP_C_OBJS := $(patsubst %.c,$(HV_OBJDIR)/%.o,$(VP_C_SRCS))
+VP_S_OBJS := $(patsubst %.S,$(HV_OBJDIR)/%.o,$(VP_S_SRCS))
+
+HOST_MOD := $(HV_MODDIR)/host_mod.a
+VP_MOD := $(HV_MODDIR)/vp_mod.a
+
+MODULES += $(HOST_MOD)
+MODULES += $(VP_MOD)
+
+$(HOST_MOD): $(HOST_C_OBJS) $(HOST_S_OBJS)
+	$(AR) $(ARFLAGS) $(HOST_MOD) $(HOST_C_OBJS) $(HOST_S_OBJS)
+
+$(VP_MOD): $(VP_C_OBJS) $(VP_S_OBJS)
+	$(AR) $(ARFLAGS) $(VP_MOD) $(VP_C_OBJS) $(VP_S_OBJS)

hypervisor/arch/riscv/dummy.c

@@ -0,0 +1,23 @@
+#define SBI_EXT_CONSOLE_PUTCHAR 0x01
+#define SBI_EXT_CONSOLE_GETCHAR 0x02
+
+#define SBI_FID_CONSOLE_PUTCHAR 0x0
+#define SBI_FID_CONSOLE_GETCHAR 0x0
+
+extern long sbi_call(long eid, long fid, long arg0, long arg1, long arg2, long arg3);
+
+static void sbi_putchar(int ch) {
+    sbi_call(SBI_EXT_CONSOLE_PUTCHAR, SBI_FID_CONSOLE_PUTCHAR, ch, 0, 0, 0);
+}
+
+static void sbi_puts(const char *str) {
+    while (*str) {
+        sbi_putchar(*str);
+        str++;
+    }
+}
+
+void print_hello_world(void) {
+    sbi_puts("Hello World!\n");
+}
+

hypervisor/arch/riscv/dummy_entry.S

@@ -0,0 +1,31 @@
+.section .text
+.global _start
+
+_start:
+    csrci sstatus, 0x2
+    li sp, 0x81010000
+    call print_hello_world
+
+wait_loop:
+    wfi
+    j wait_loop
+
+.global sbi_call
+sbi_call:
+    mv t0, a0
+    mv t1, a1
+
+    mv a0, a2
+    mv a1, a3
+    mv a2, a4
+    mv a3, a5
+    mv a4, a6
+    mv a5, a7
+
+    mv a6, t1
+    mv a7, t0
+
+    ecall
+
+    ret
+

hypervisor/arch/riscv/guest/dummy_guest.c

@@ -0,0 +1,38 @@
+ENTRY(_start)
+
+MEMORY {
+    RAM : ORIGIN = 0x81000000, LENGTH = 64K
+}
+
+SECTIONS {
+	/* TODO: Replace hardcodes with macros defined in config header */
+    . = 0x81000000;
+
+    .text : {
+        *(.text)
+        *(.text.*)
+        *(.note.gnu.build-id)
+    } > RAM
+
+    .rodata : {
+        *(.rodata)
+        *(.rodata.*)
+    } > RAM
+
+    .data : {
+        *(.data)
+        *(.data.*)
+    } > RAM
+
+    .bss (NOLOAD) : {
+        *(.bss)
+        *(.bss.*)
+        *(COMMON)
+    } > RAM
+
+    . = ALIGN(8);
+    _end = .;
+
+    . = 0x81010000;
+    _stack_top = .;
+}