From 7f357f2d2852918f2a4c8942caf2068ad44c503e Mon Sep 17 00:00:00 2001 From: celadon Date: Wed, 18 Jun 2025 12:16:35 +0000 Subject: [PATCH] [TWL] Enable Android Support on TWL platform Add pci IDs for TWL platform for applicable places Tracked-On: OAM-133231 Signed-off-by: Basanagouda Nagappa Koppad --- .../gmmlib/0001-gmmlib-Add-twl-pci-ids.patch | 24 +++++++++ .../media/mod/0002-mod-add-twl-pci-ids.patch | 28 ++++++++++ .../mesa3d-intel/0001-Add-TWL-pci-ID.patch | 24 +++++++++ .../0001-Minigbm-intel-Add-TWL-PCI-ID.patch | 54 +++++++++++++++++++ .../31_0031-Add-TWL-PCI-IDs.patch | 26 +++++++++ .../0005-onevpl-gpu-Add-TWL-Pci-IDs.patch | 24 +++++++++ 6 files changed, 180 insertions(+) create mode 100644 bsp_diff/caas/hardware/intel/external/media/gmmlib/0001-gmmlib-Add-twl-pci-ids.patch create mode 100644 bsp_diff/caas/hardware/intel/external/media/mod/0002-mod-add-twl-pci-ids.patch create mode 100644 bsp_diff/caas/hardware/intel/external/mesa3d-intel/0001-Add-TWL-pci-ID.patch create mode 100644 bsp_diff/caas/hardware/intel/external/minigbm-intel/0001-Minigbm-intel-Add-TWL-PCI-ID.patch create mode 100644 bsp_diff/caas/kernel/lts2020-yocto-sriov/31_0031-Add-TWL-PCI-IDs.patch create mode 100644 bsp_diff/caas/vendor/intel/external/onevpl-intel-gpu/0005-onevpl-gpu-Add-TWL-Pci-IDs.patch diff --git a/bsp_diff/caas/hardware/intel/external/media/gmmlib/0001-gmmlib-Add-twl-pci-ids.patch b/bsp_diff/caas/hardware/intel/external/media/gmmlib/0001-gmmlib-Add-twl-pci-ids.patch new file mode 100644 index 0000000..b573e59 --- /dev/null +++ b/bsp_diff/caas/hardware/intel/external/media/gmmlib/0001-gmmlib-Add-twl-pci-ids.patch @@ -0,0 +1,24 @@ +From 46da51dea51cfe485e263df4b39663d285e11011 Mon Sep 17 00:00:00 2001 +From: celadon +Date: Wed, 18 Jun 2025 12:05:44 +0000 +Subject: [PATCH] [gmmlib] Add twl pci ids + +Tracked-On: OAM-xxx +Signed-off-by: celadon + +diff --git a/Source/inc/common/igfxfmid.h b/Source/inc/common/igfxfmid.h +index 37fe520..8448312 100644 +--- a/Source/inc/common/igfxfmid.h ++++ b/Source/inc/common/igfxfmid.h +@@ -1750,6 +1750,8 @@ typedef enum __NATIVEGTTYPE + #define DEV_ID_46D0 0x46D0 + #define DEV_ID_46D1 0x46D1 + #define DEV_ID_46D2 0x46D2 ++#define DEV_ID_46D3 0x46D3 ++#define DEV_ID_46D4 0x46D4 + + #define MGM_HAS 0 + +-- +2.34.1 + diff --git a/bsp_diff/caas/hardware/intel/external/media/mod/0002-mod-add-twl-pci-ids.patch b/bsp_diff/caas/hardware/intel/external/media/mod/0002-mod-add-twl-pci-ids.patch new file mode 100644 index 0000000..fbfd480 --- /dev/null +++ b/bsp_diff/caas/hardware/intel/external/media/mod/0002-mod-add-twl-pci-ids.patch @@ -0,0 +1,28 @@ +From 1f3daa4093e06272a10121e3c95d34d207f6b766 Mon Sep 17 00:00:00 2001 +From: celadon +Date: Wed, 18 Jun 2025 12:07:08 +0000 +Subject: [PATCH] [mod] add twl pci ids + +Tracked-On: OAM-xxx +Signed-off-by: celadon + +diff --git a/media_driver/linux/gen12/ddi/media_sysinfo_g12.cpp b/media_driver/linux/gen12/ddi/media_sysinfo_g12.cpp +index 1fcf39c36..7813ce6bf 100644 +--- a/media_driver/linux/gen12/ddi/media_sysinfo_g12.cpp ++++ b/media_driver/linux/gen12/ddi/media_sysinfo_g12.cpp +@@ -563,6 +563,12 @@ static bool adlnGt1Device46D1 = DeviceInfoFactory:: + + static bool adlnGt1Device46D2 = DeviceInfoFactory:: + RegisterDevice(0x46D2, &adlnGt1Info); ++ ++static bool adlnGt1Device46D3 = DeviceInfoFactory:: ++ RegisterDevice(0x46D3, &adlnGt1Info); ++ ++static bool adlnGt1Device46D4 = DeviceInfoFactory:: ++ RegisterDevice(0x46D4, &adlnGt1Info); + #endif + + static bool tgllpGt2Device9a40 = DeviceInfoFactory:: +-- +2.34.1 + diff --git a/bsp_diff/caas/hardware/intel/external/mesa3d-intel/0001-Add-TWL-pci-ID.patch b/bsp_diff/caas/hardware/intel/external/mesa3d-intel/0001-Add-TWL-pci-ID.patch new file mode 100644 index 0000000..160c83e --- /dev/null +++ b/bsp_diff/caas/hardware/intel/external/mesa3d-intel/0001-Add-TWL-pci-ID.patch @@ -0,0 +1,24 @@ +From 03ab11e8ad22fda35e984fd5274d9fa951c98dde Mon Sep 17 00:00:00 2001 +From: celadon +Date: Wed, 18 Jun 2025 11:58:04 +0000 +Subject: [PATCH] Add TWL pci ID + +Tracked-On: OAM-xxxx +Signed-off-by: Basanagouda Nagappa Koppad + +diff --git a/include/pci_ids/iris_pci_ids.h b/include/pci_ids/iris_pci_ids.h +index 0684af35133..19488bf8e72 100644 +--- a/include/pci_ids/iris_pci_ids.h ++++ b/include/pci_ids/iris_pci_ids.h +@@ -188,6 +188,8 @@ CHIPSET(0x46c3, adl_gt2, "ADL GT2", "Intel(R) Graphics") + CHIPSET(0x46d0, adl_n, "ADL-N", "Intel(R) Graphics") + CHIPSET(0x46d1, adl_n, "ADL-N", "Intel(R) Graphics") + CHIPSET(0x46d2, adl_n, "ADL-N", "Intel(R) Graphics") ++CHIPSET(0x46d3, adl_n, "ADL-N", "Intel(R) Graphics") ++CHIPSET(0x46d4, adl_n, "ADL-N", "Intel(R) Graphics") + + CHIPSET(0x9A40, tgl_gt2, "TGL GT2", "Intel(R) Xe Graphics") + CHIPSET(0x9A49, tgl_gt2, "TGL GT2", "Intel(R) Xe Graphics") +-- +2.34.1 + diff --git a/bsp_diff/caas/hardware/intel/external/minigbm-intel/0001-Minigbm-intel-Add-TWL-PCI-ID.patch b/bsp_diff/caas/hardware/intel/external/minigbm-intel/0001-Minigbm-intel-Add-TWL-PCI-ID.patch new file mode 100644 index 0000000..f7454a7 --- /dev/null +++ b/bsp_diff/caas/hardware/intel/external/minigbm-intel/0001-Minigbm-intel-Add-TWL-PCI-ID.patch @@ -0,0 +1,54 @@ +From ab95a2a2f3586062b333d900cffed9dfcb94253a Mon Sep 17 00:00:00 2001 +From: celadon +Date: Wed, 18 Jun 2025 12:03:41 +0000 +Subject: [PATCH] [Minigbm-intel] Add TWL PCI ID + +Tracked-On: OAM-xxx +Signed-off-by: celadon + +diff --git a/0001-Minigbm-intel-Add-TWL-PCI-ID.patch b/0001-Minigbm-intel-Add-TWL-PCI-ID.patch +new file mode 100644 +index 0000000..b390dea +--- /dev/null ++++ b/0001-Minigbm-intel-Add-TWL-PCI-ID.patch +@@ -0,0 +1,24 @@ ++From 83368303280c60b79dee1d3c44437b307a80d415 Mon Sep 17 00:00:00 2001 ++From: celadon ++Date: Wed, 18 Jun 2025 12:03:41 +0000 ++Subject: [PATCH] [Minigbm-intel] Add TWL PCI ID ++ ++Tracked-On: OAM-xxx ++Signed-off-by: celadon ++ ++diff --git a/i915.c b/i915.c ++index 3b27b25..a660cd3 100644 ++--- a/i915.c +++++ b/i915.c ++@@ -80,7 +80,7 @@ static void i915_info_from_device_id(struct i915_device *i915) ++ 0x46A0, 0x46A1, 0x46A2, 0x46A3, 0x46A6, 0x46A8, ++ 0x46AA, 0x462A, 0x4626, 0x4628, 0x46B0, 0x46B1, ++ 0x46B2, 0x46B3, 0x46C0, 0x46C1, 0x46C2, 0x46C3, ++- 0x46D0, 0x46D1, 0x46D2 +++ 0x46D0, 0x46D1, 0x46D2, 0x46D3, 0x46D4, ++ }; ++ ++ unsigned i; ++-- ++2.34.1 ++ +diff --git a/i915.c b/i915.c +index 3b27b25..a1e63b3 100644 +--- a/i915.c ++++ b/i915.c +@@ -80,7 +80,7 @@ static void i915_info_from_device_id(struct i915_device *i915) + 0x46A0, 0x46A1, 0x46A2, 0x46A3, 0x46A6, 0x46A8, + 0x46AA, 0x462A, 0x4626, 0x4628, 0x46B0, 0x46B1, + 0x46B2, 0x46B3, 0x46C0, 0x46C1, 0x46C2, 0x46C3, +- 0x46D0, 0x46D1, 0x46D2 ++ 0x46D0, 0x46D1, 0x46D2, 0x46D3, 0x46D4 + }; + + unsigned i; +-- +2.34.1 + diff --git a/bsp_diff/caas/kernel/lts2020-yocto-sriov/31_0031-Add-TWL-PCI-IDs.patch b/bsp_diff/caas/kernel/lts2020-yocto-sriov/31_0031-Add-TWL-PCI-IDs.patch new file mode 100644 index 0000000..a4dd1e6 --- /dev/null +++ b/bsp_diff/caas/kernel/lts2020-yocto-sriov/31_0031-Add-TWL-PCI-IDs.patch @@ -0,0 +1,26 @@ +From d7d0592359d3419ed4e4c04f3874feb61a00fc83 Mon Sep 17 00:00:00 2001 +From: celadon +Date: Thu, 19 Jun 2025 04:25:07 +0000 +Subject: [PATCH] Add TWL PCI IDs + +Tracked-On: OAM-xxx +Signed-off-by: Basanagouda Nagappa Koppad + +diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h +index a84157463ba8..77383d40c319 100644 +--- a/include/drm/i915_pciids.h ++++ b/include/drm/i915_pciids.h +@@ -672,7 +672,9 @@ + #define INTEL_ADLN_IDS(info) \ + INTEL_VGA_DEVICE(0x46D0, info), \ + INTEL_VGA_DEVICE(0x46D1, info), \ +- INTEL_VGA_DEVICE(0x46D2, info) ++ INTEL_VGA_DEVICE(0x46D2, info), \ ++ INTEL_VGA_DEVICE(0x46D3, info), \ ++ INTEL_VGA_DEVICE(0x46D4, info) + + /* RPL-S */ + #define INTEL_RPLS_IDS(info) \ +-- +2.34.1 + diff --git a/bsp_diff/caas/vendor/intel/external/onevpl-intel-gpu/0005-onevpl-gpu-Add-TWL-Pci-IDs.patch b/bsp_diff/caas/vendor/intel/external/onevpl-intel-gpu/0005-onevpl-gpu-Add-TWL-Pci-IDs.patch new file mode 100644 index 0000000..af0ed3c --- /dev/null +++ b/bsp_diff/caas/vendor/intel/external/onevpl-intel-gpu/0005-onevpl-gpu-Add-TWL-Pci-IDs.patch @@ -0,0 +1,24 @@ +From 5a70ea28c76ed7fa96bae63c27243e1d0275537c Mon Sep 17 00:00:00 2001 +From: celadon +Date: Wed, 18 Jun 2025 12:40:33 +0000 +Subject: [PATCH] [onevpl-gpu] Add TWL Pci IDs + +Tracked-On: OAM-XXXX +Signed-off-by: celadon + +diff --git a/_studio/shared/include/mfxstructures-int.h b/_studio/shared/include/mfxstructures-int.h +index dffb317e..1cb2854b 100755 +--- a/_studio/shared/include/mfxstructures-int.h ++++ b/_studio/shared/include/mfxstructures-int.h +@@ -461,6 +461,8 @@ typedef struct { + { 0x46D0, MFX_HW_ADL_N, MFX_GT1 },//ADL-N + { 0x46D1, MFX_HW_ADL_N, MFX_GT1 },//ADL-N + { 0x46D2, MFX_HW_ADL_N, MFX_GT1 },//ADL-N ++ { 0x46D3, MFX_HW_ADL_N, MFX_GT1 },//ADL-N ++ { 0x46D4, MFX_HW_ADL_N, MFX_GT1 },//ADL-N + + /*RPL-P*/ + { 0xA7A0, MFX_HW_ADL_P, MFX_GT2 },//RPL-P +-- +2.34.1 +