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Merge pull request #837 from uyjulian/asm_mmio_cleanup
Convert MMIO accesses in assembly to C
2 parents 9904d0c + 0823176 commit 2010be9

2 files changed

Lines changed: 39 additions & 108 deletions

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‎ee/debug/src/scr_printf.c‎

Lines changed: 23 additions & 83 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@
2020
#include <rom0_info.h>
2121
#include <stdarg.h>
2222
#include <debug.h>
23+
#include <ee_regs.h>
2324

2425
static short int X = 0, Y = 0;
2526
static short int MX = 80, MY = 40;
@@ -56,7 +57,7 @@ static int debug_detect_signal()
5657
static void Init_GS(int interlace, int omode, int ffmd)
5758
{
5859
// Reset GS
59-
*(vu64 *)0x12001000 = 0x200;
60+
*R_EE_GS_CSR = 0x200;
6061
// Mask interrupts
6162
GsPutIMR(0xff00);
6263
// Configure GS CRT
@@ -65,13 +66,6 @@ static void Init_GS(int interlace, int omode, int ffmd)
6566

6667
static void SetVideoMode(void)
6768
{
68-
unsigned dma_addr;
69-
unsigned val1;
70-
unsigned val2;
71-
unsigned val3;
72-
unsigned val4;
73-
unsigned val4_lo;
74-
7569
/* DISPLAY1 0x0983227c001bf9ff
7670
DX = 0x27C (636)
7771
DY = 0x032 (50)
@@ -82,77 +76,33 @@ static void SetVideoMode(void)
8276
DW = 0x9FF (2560)
8377
DH = 0x1BF (447) */
8478

85-
asm volatile(" .set push \n"
86-
" .set noreorder \n"
87-
" lui %4, 0x001b \n"
88-
" lui %5, 0x0983 \n"
89-
" lui %0, 0x1200 \n"
90-
" ori %4, %4, 0xf9ff \n"
91-
" ori %5, %5, 0x227c \n"
92-
" li %1, 0xff62 \n"
93-
" dsll32 %4, %4, 0 \n"
94-
" li %3, 0x1400 \n"
95-
" sd %1, 0(%0) \n"
96-
" or %4, %4, %5 \n"
97-
" sd %3, 0x90(%0) \n"
98-
" sd %4, 0xa0(%0) \n"
99-
" .set pop \n"
100-
: "=&r"(dma_addr), "=&r"(val1), "=&r"(val2),
101-
"=&r"(val3), "=&r"(val4), "=&r"(val4_lo));
79+
*R_EE_GS_PMODE = 0xff62;
80+
*R_EE_GS_DISPFB2 = 0x1400;
81+
*R_EE_GS_DISPLAY2 = 0x001bf9ff0983227c;
10282
}
10383

10484
static inline void Dma02Wait(void)
10585
{
106-
unsigned dma_addr;
107-
unsigned status;
108-
109-
asm volatile(" .set push \n"
110-
" .set noreorder \n"
111-
" lui %0, 0x1001 \n"
112-
" lw %1, -0x6000(%0) \n"
113-
"1: andi %1, %1, 0x100 \n" // Wait until STR bit of D2_CHCR = 0
114-
" nop \n"
115-
" nop \n"
116-
" nop \n"
117-
" nop \n"
118-
" bnel %1, $0, 1b \n"
119-
" lw %1, -0x6000(%0) \n"
120-
" .set pop \n"
121-
: "=&r"(dma_addr), "=&r"(status));
86+
while ((*R_EE_D2_CHCR & 0x100) != 0); // Wait until STR bit of D2_CHCR = 0
12287
}
12388

12489
static void DmaReset(void)
12590
{
126-
unsigned dma_addr;
127-
unsigned temp, temp2;
128-
12991
// This appears to have been based on code from Sony that initializes DMA channels 0-9, in bulk.
130-
asm volatile(" .set push \n"
131-
" .set noreorder \n"
132-
" lui %0, 0x1001 \n"
133-
" sw $0, -0x5f80(%0) \n" // D2_SADR = 0. Documented to not exist, but is done.
134-
" sw $0, -0x6000(%0) \n" // D2_CHCR = 0
135-
" sw $0, -0x5fd0(%0) \n" // D2_TADR = 0
136-
" sw $0, -0x5ff0(%0) \n" // D2_MADR = 0
137-
" sw $0, -0x5fb0(%0) \n" // D2_ASR1 = 0
138-
" sw $0, -0x5fc0(%0) \n" // D2_ASR0 = 0
139-
" lui %1, 0 \n"
140-
" ori %1, %1, 0xff1f \n"
141-
" sw %1, -0x1ff0(%0) \n" // Clear all interrupt status under D_STAT, other than SIF0, SIF1 & SIF2.
142-
" lw %1, -0x1ff0(%0) \n"
143-
" lui %2, 0xff1f \n"
144-
" and %1, %1, %2 \n" // Clear all interrupt masks under D_STAT, other SIF0, SIF1 & SIF2. Writing a 1 reverses the bit.
145-
" sw %1, -0x1ff0(%0) \n"
146-
" sw $0, -0x2000(%0) \n" // D_CTRL = 0
147-
" sw $0, -0x1fe0(%0) \n" // D_PCR = 0
148-
" sw $0, -0x1fd0(%0) \n" // D_SQWC = 0
149-
" sw $0, -0x1fb0(%0) \n" // D_RBOR = 0
150-
" sw $0, -0x1fc0(%0) \n" // D_RBSR = 0
151-
" lw %1, -0x2000(%0) \n"
152-
" ori %1, %1, 1 \n" // D_CTRL (DMAE 1)
153-
" sw %1, -0x2000(%0) \n"
154-
" .set pop \n"
155-
: "=&r"(dma_addr), "=&r"(temp), "=&r"(temp2));
92+
*((vu32 *)0x1000a080) = 0; // D2_SADR = 0. Documented to not exist, but is done.
93+
*R_EE_D2_CHCR = 0;
94+
*R_EE_D2_TADR = 0;
95+
*R_EE_D2_MADR = 0;
96+
*R_EE_D2_ASR1 = 0;
97+
*R_EE_D2_ASR0 = 0;
98+
*R_EE_D_STAT = 0xff1f; // Clear all interrupt status under D_STAT, other than SIF0, SIF1 & SIF2.
99+
*R_EE_D_STAT &= 0xff1f << 16; // Clear all interrupt masks under D_STAT, other SIF0, SIF1 & SIF2. Writing a 1 reverses the bit.
100+
*R_EE_D_CTRL = 0;
101+
*R_EE_D_PCR = 0;
102+
*R_EE_D_SQWC = 0;
103+
*R_EE_D_RBOR = 0;
104+
*R_EE_D_RBSR = 0;
105+
*R_EE_D_CTRL |= 1; // (DMAE 1)
156106
}
157107

158108
/**
@@ -163,19 +113,9 @@ static void DmaReset(void)
163113

164114
static inline void progdma(void *addr, int size)
165115
{
166-
unsigned dma_addr;
167-
unsigned temp;
168-
169-
asm volatile(" .set push \n"
170-
" .set noreorder \n"
171-
" lui %0, 0x1001 \n"
172-
" sw %3, -0x5fe0(%0) \n" // D2_QWC
173-
" sw %2, -0x5ff0(%0) \n" // D2_MADR
174-
" li %1, 0x101 \n" // STR 1, DIR 1
175-
" sw %1, -0x6000(%0) \n" // D2_CHCR
176-
" .set pop \n"
177-
: "=&r"(dma_addr), "=&r"(temp)
178-
: "r"(addr), "r"(size));
116+
*R_EE_D2_QWC = (u32)size; // D2_QWC
117+
*R_EE_D2_MADR = (u32)addr; // D2_MADR
118+
*R_EE_D2_CHCR = 0x101; // D2_CHCR = STR 1, DIR 1
179119
}
180120

181121
void scr_setbgcolor(u32 color)

‎ee/libgs/src/dma.c‎

Lines changed: 16 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,7 @@
1212
#include <stdio.h>
1313
#include <kernel.h>
1414
#include <libgs.h>
15+
#include <ee_regs.h>
1516

1617
#include "internal.h"
1718

@@ -59,30 +60,20 @@ void GsDmaInit(void)
5960
{
6061
/* This appears to have been based on code from Sony that initializes DMA channels 0-9, in bulk.
6162
Reset/init DMA CH 2 (GIF) only. */
62-
__asm__(
63-
"li $2,0x1000A000 \n"
64-
"sw $0,0x80($2) \n" // D2_SADR = 0. Documented to not exist, but is done.
65-
"sw $0,0($2) \n" // D2_CHCR = 0
66-
"sw $0,0x30($2) \n" // D2_TADR = 0
67-
"sw $0,0x10($2) \n" // D2_MADR = 0
68-
"sw $0,0x50($2) \n" // D2_ASR1 = 0
69-
"sw $0,0x40($2) \n" // D2_ASR0 = 0
70-
"li $2,0xFF1F \n" // Clear all interrupt status under D_STAT, other than SIF0, SIF1 & SIF2.
71-
"sw $2,0x1000E010 \n"
72-
"lw $2,0x1000E010 \n"
73-
"lui $3,0xFF1F \n" // Clear all interrupt masks under D_STAT, other SIF0, SIF1 & SIF2. Writing a 1 reverses the bit.
74-
"and $2,$3 \n"
75-
"sw $2,0x1000E010 \n"
76-
"sw $0,0x1000E000 \n" // D_CTRL = 0
77-
"sw $0,0x1000E020 \n" // D_PCR = 0
78-
"sw $0,0x1000E030 \n" // D_SQWC = 0
79-
"sw $0,0x1000E050 \n" // D_RBOR = 0
80-
"sw $0,0x1000E040 \n" // D_RBSR = 0
81-
"li $3,1 \n"
82-
"lw $2,0x1000E000 \n"
83-
"ori $3,$2,1 \n" // D_CTRL (DMAE 1)
84-
"sw $3,0x1000E000 \n"
85-
);
63+
*((vu32 *)0x1000A080) = 0; // D2_SADR = 0. Documented to not exist, but is done.
64+
*R_EE_D2_CHCR = 0;
65+
*R_EE_D2_TADR = 0;
66+
*R_EE_D2_MADR = 0;
67+
*R_EE_D2_ASR1 = 0;
68+
*R_EE_D2_ASR0 = 0;
69+
*R_EE_D_STAT = 0xFF1F; // Clear all interrupt status under D_STAT, other than SIF0, SIF1 & SIF2.
70+
*R_EE_D_STAT &= 0xFF1F << 16; // Clear all interrupt masks under D_STAT, other SIF0, SIF1 & SIF2. Writing a 1 reverses the bit.
71+
*R_EE_D_CTRL = 0;
72+
*R_EE_D_PCR = 0;
73+
*R_EE_D_SQWC = 0;
74+
*R_EE_D_RBOR = 0;
75+
*R_EE_D_RBSR = 0;
76+
*R_EE_D_CTRL |= 1; // (DMAE 1)
8677
}
8778

8879
void GsDmaSend(const void *addr, u32 qwords)
@@ -157,6 +148,6 @@ void GsDmaSend_tag(const void *addr, u32 qwords, const GS_GIF_DMACHAIN_TAG *tag)
157148

158149
void GsDmaWait(void)
159150
{
160-
while(*((vu32 *)(0x1000a000)) & ((u32)1<<8));
151+
while(*R_EE_D2_CHCR & ((u32)1<<8));
161152
asm("":::"memory");
162153
}

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