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Merge pull request #848 from uyjulian/asm_decl_consistent
Cleanup of inline assembly
2 parents 97ab838 + 89b9d8c commit b12f8af

36 files changed

Lines changed: 258 additions & 296 deletions

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‎common/include/mipscopaccess.h‎

Lines changed: 72 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,72 @@
1+
/**
2+
* @file
3+
* MIPS COP coprocessor access
4+
*/
5+
6+
#ifndef __MIPSCOPACCESS_H__
7+
#define __MIPSCOPACCESS_H__
8+
9+
#include <tamtypes.h>
10+
11+
enum mips_cop0_reg
12+
{
13+
/** Programmable register to select TLB entry for reading or writing (purpose: MMU) */
14+
COP0_REG_Index = 0,
15+
/** Pseudo-random counter for TLB replacement (purpose: MMU) */
16+
COP0_REG_Random = 1,
17+
/** Low half of TLB entry for even PFN (Physical page number) (purpose: MMU) */
18+
COP0_REG_EntryLo0 = 2,
19+
/** Low half of TLB entry for odd PFN (Physical page number) (purpose: MMU) */
20+
COP0_REG_EntryLo1 = 3,
21+
/** Pointer to kernel virtual PTE table (purpose: Exception) */
22+
COP0_REG_Context = 4,
23+
/** Mask that sets the TLB page size (purpose: MMU) */
24+
COP0_REG_PageMask = 5,
25+
/** Number of wired TLB entries (purpose: MMU) */
26+
COP0_REG_Wired = 6,
27+
/** Bad virtual address (purpose: Exception) */
28+
COP0_REG_BadVAddr = 8,
29+
/** Timer compare (purpose: Exception) */
30+
COP0_REG_Count = 9,
31+
/** High half of TLB entry(Virtual page number and ASID) (purpose: MMU) */
32+
COP0_REG_EntryHi = 10,
33+
/** Timer compare (purpose: Exception) */
34+
COP0_REG_Compare = 11,
35+
/** Processor Status Register (purpose: Exception) */
36+
COP0_REG_Status = 12,
37+
/** Cause of the last exception taken (purpose: Exception) */
38+
COP0_REG_Cause = 13,
39+
/** Exception Program Counter (purpose: Exception) */
40+
COP0_REG_EPC = 14,
41+
/** Processor Revision Identifier (purpose: MMU) */
42+
COP0_REG_PRId = 15,
43+
/** Configuration Register (purpose: MMU) */
44+
COP0_REG_Config = 16,
45+
/** Bad Physical Address (purpose: Exception) */
46+
COP0_REG_BadPAddr = 23,
47+
/** This is used for Debug function (purpose: Debug) */
48+
COP0_REG_Debug = 24,
49+
/** Performance Counter and Control Register (purpose: Exception) */
50+
COP0_REG_Perf = 25,
51+
/** Cache Tag register(low bits) (purpose: MMU) */
52+
COP0_REG_TagLo = 28,
53+
/** Cache Tag register(high bits) (purpose: MMU) */
54+
COP0_REG_TagHi = 29,
55+
/** Error Exception Program Counter (purpose: Exception) */
56+
COP0_REG_ErrorPC = 30,
57+
};
58+
59+
static inline __attribute__((__always_inline__)) u32 get_mips_cop_reg(const u32 cop, const u32 idx)
60+
{
61+
u32 val;
62+
63+
__asm__ __volatile__("mfc%[cop]\t%[val], $%[idx]\n" : [val] "=r"(val) : [cop] "i"(cop), [idx] "i"(idx));
64+
return val;
65+
}
66+
67+
static inline __attribute__((__always_inline__)) void set_mips_cop_reg(const u32 cop, const u32 idx, u32 val)
68+
{
69+
__asm__ __volatile__("mtc%[cop]\t%[val], $%[idx]\n" :: [val] "r"(val), [cop] "i"(cop), [idx] "i"(idx));
70+
}
71+
72+
#endif /* __MIPSCOPACCESS_H__ */

‎common/sbus/src/ps2_sbus.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,7 @@ static u32 _get_reg(u32 *reg)
2626

2727
#ifdef _EE
2828
// EE needs 20 NOPs!
29-
__asm__ volatile("nop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\n");
29+
__asm__ __volatile__("nop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\nnop\n");
3030
#endif
3131

3232
v2 = *(vu32 *)reg;

‎ee/debug/src/screenshot.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -250,7 +250,7 @@ int ps2_screenshot( void *pDest, unsigned int VramAdress, unsigned int x,
250250
*PS2SS_D1_MADR = (u32)p_dma32;
251251
*PS2SS_D1_CHCR = 0x101;
252252

253-
asm __volatile__("sync.l\n");
253+
EE_SYNCL();
254254

255255
// check if DMA is complete (STR=0)
256256

@@ -272,13 +272,13 @@ int ps2_screenshot( void *pDest, unsigned int VramAdress, unsigned int x,
272272
*PS2SS_D1_MADR = (u32)pDest;
273273
*PS2SS_D1_CHCR = 0x100;
274274

275-
asm __volatile__(" sync.l\n");
275+
EE_SYNCL();
276276

277277
// check if DMA is complete (STR=0)
278278

279279
while ( *PS2SS_D1_CHCR & 0x0100 );
280280
*PS2SS_D1_CHCR = prev_chcr;
281-
asm __volatile__(" sync.l\n");
281+
EE_SYNCL();
282282
*PS2SS_VIF1_STAT = 0;
283283
*PS2SS_GS_BUSDIR = (u64)0;
284284

‎ee/dma/src/dma.c‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -115,8 +115,9 @@ void dma_channel_fast_waits(int channel)
115115
void dma_wait_fast(void)
116116
{
117117

118-
asm volatile (
119-
"sync.l; sync.p;" \
118+
EE_SYNCL();
119+
EE_SYNCP();
120+
__asm__ __volatile__ (
120121
"0:" \
121122
"bc0t 0f; nop;" \
122123
"bc0t 0f; nop;" \

‎ee/elf-loader/src/elf.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@ MEMORY {
4242
static void wipe_bramMem(void) {
4343
int i;
4444
for (i = 0x00084000; i < 0x100000; i += 64) {
45-
asm volatile(
45+
__asm__ __volatile__(
4646
"\tsq $0, 0(%0) \n"
4747
"\tsq $0, 16(%0) \n"
4848
"\tsq $0, 32(%0) \n"

‎ee/elf-loader/src/loader/src/loader.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -62,7 +62,7 @@ static void wipeUserMem(void)
6262
{
6363
int i;
6464
for (i = 0x100000; i < GetMemorySize(); i += 64) {
65-
asm volatile(
65+
__asm__ __volatile__(
6666
"\tsq $0, 0(%0) \n"
6767
"\tsq $0, 16(%0) \n"
6868
"\tsq $0, 32(%0) \n"

‎ee/graph/src/graph_mode.c‎

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -94,7 +94,7 @@ static inline int __udelay(unsigned int usecs)
9494

9595
}
9696

97-
asm volatile (
97+
__asm__ __volatile__ (
9898
".set push\n\t"
9999
".set noreorder\n\t"
100100
"0:\n\t"
@@ -141,8 +141,8 @@ int graph_set_mode(int interlace, int mode, int ffmd, int flicker_filter)
141141
GsPutIMR(0x00007700);
142142

143143
// Ensure registers are written prior to setting another mode.
144-
asm volatile ("sync.p\n\t"
145-
"nop\n\t");
144+
EE_SYNCP();
145+
__asm__ __volatile__ ("nop\n\t");
146146

147147
// If 576P is requested, check if bios supports it.
148148
if (mode == GRAPH_MODE_HDTV_576P)
@@ -376,7 +376,8 @@ void graph_set_smode1(char cmod, char gcont)
376376
// Disable PRST for TV modes and enable for all other modes.
377377
*GS_REG_SMODE1 = smode1_val | (u64)1 << 16;
378378

379-
asm volatile ("sync.l; sync.p;");
379+
EE_SYNCL();
380+
EE_SYNCP();
380381

381382
// If VESA, 1080I, or 720P, disable bit PRST now and delay 2.5ms.
382383
if ((graph_crtmode >= 0x1A) && (graph_crtmode != 0x50) && (graph_crtmode != 0x53))
@@ -393,7 +394,8 @@ void graph_set_smode1(char cmod, char gcont)
393394
// Now enable read circuits.
394395
*GS_REG_PMODE = pmode_val;
395396

396-
asm volatile ("sync.l; sync.p;");
397+
EE_SYNCL();
398+
EE_SYNCP();
397399

398400
}
399401

‎ee/kernel/include/kernel.h‎

Lines changed: 20 additions & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -20,17 +20,18 @@
2020
#include <stddef.h>
2121
#include <stdarg.h>
2222
#include <sifdma.h>
23+
#include <mipscopaccess.h>
2324

2425
#define DI DIntr
2526
#define EI EIntr
2627

2728
// Workaround for EE kernel bug: call this immediately before returning from any interrupt handler.
28-
#define ExitHandler() asm volatile("sync\nei\n")
29+
#define ExitHandler() __asm__ __volatile__("sync\nei\n")
2930

3031
// note: 'sync' is the same as 'sync.l'
31-
#define EE_SYNC() __asm__ volatile("sync")
32-
#define EE_SYNCL() __asm__ volatile("sync.l")
33-
#define EE_SYNCP() __asm__ volatile("sync.p")
32+
#define EE_SYNC() __asm__ __volatile__("sync")
33+
#define EE_SYNCL() __asm__ __volatile__("sync.l")
34+
#define EE_SYNCP() __asm__ __volatile__("sync.p")
3435

3536
#define UNCACHED_SEG(x) \
3637
((void *)(((u32)(x)) | 0x20000000))
@@ -143,58 +144,37 @@ static inline void nopdelay(void)
143144
int i = 0xfffff;
144145

145146
do {
146-
__asm__("nop\nnop\nnop\nnop\nnop\n");
147+
__asm__ __volatile__("nop\nnop\nnop\nnop\nnop\n");
147148
} while (i-- != -1);
148149
}
149150

150151
static inline int ee_get_opmode(void)
151152
{
152153
u32 status;
153154

154-
__asm__ volatile(
155-
".set\tpush\n\t"
156-
".set\tnoreorder\n\t"
157-
"mfc0\t%0, $12\n\t"
158-
".set\tpop\n\t"
159-
: "=r"(status));
155+
status = get_mips_cop_reg(0, COP0_REG_Status);
160156

161157
return ((status >> 3) & 3);
162158
}
163159

164160
static inline int ee_set_opmode(u32 opmode)
165161
{
166-
u32 status, mask;
167-
168-
__asm__ volatile(
169-
".set\tpush\n\t"
170-
".set\tnoreorder\n\t"
171-
"mfc0\t%0, $12\n\t"
172-
"li\t%1, 0xffffffe7\n\t"
173-
"and\t%0, %1\n\t"
174-
"or\t%0, %2\n\t"
175-
"mtc0\t%0, $12\n\t"
176-
"sync.p\n\t"
177-
".set\tpop\n\t"
178-
: "=r"(status), "=r"(mask)
179-
: "r"(opmode));
162+
u32 status;
163+
164+
status = (get_mips_cop_reg(0, COP0_REG_Status) & ~0x18) | opmode;
165+
set_mips_cop_reg(0, COP0_REG_Status, status);
166+
EE_SYNCP();
180167

181168
return ((status >> 3) & 3);
182169
}
183170

184171
static inline int ee_kmode_enter()
185172
{
186-
u32 status, mask;
187-
188-
__asm__ volatile(
189-
".set\tpush\n\t"
190-
".set\tnoreorder\n\t"
191-
"mfc0\t%0, $12\n\t"
192-
"li\t%1, 0xffffffe7\n\t"
193-
"and\t%0, %1\n\t"
194-
"mtc0\t%0, $12\n\t"
195-
"sync.p\n\t"
196-
".set\tpop\n\t"
197-
: "=r"(status), "=r"(mask));
173+
u32 status;
174+
175+
status = (get_mips_cop_reg(0, COP0_REG_Status) & ~0x18);
176+
set_mips_cop_reg(0, COP0_REG_Status, status);
177+
EE_SYNCP();
198178

199179
return status;
200180
}
@@ -203,15 +183,9 @@ static inline int ee_kmode_exit()
203183
{
204184
int status;
205185

206-
__asm__ volatile(
207-
".set\tpush\n\t"
208-
".set\tnoreorder\n\t"
209-
"mfc0\t%0, $12\n\t"
210-
"ori\t%0, 0x10\n\t"
211-
"mtc0\t%0, $12\n\t"
212-
"sync.p\n\t"
213-
".set\tpop\n\t"
214-
: "=r"(status));
186+
status = get_mips_cop_reg(0, COP0_REG_Status) | 0x10;
187+
set_mips_cop_reg(0, COP0_REG_Status, status);
188+
EE_SYNCP();
215189

216190
return status;
217191
}

‎ee/kernel/src/delaythread.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@
1717
#include <timer.h>
1818
#include <timer_alarm.h>
1919
#include <delaythread.h>
20+
#include <mipscopaccess.h>
2021

2122
#ifdef F_DelayThread
2223
static u64 DelayThreadWakeup_callback(s32 alarm_id, u64 scheduled_time, u64 actual_time, void *arg, void *pc_value)
@@ -38,7 +39,7 @@ s32 DelayThread(s32 microseconds)
3839
s32 timer_alarm_id;
3940
ee_sema_t sema;
4041

41-
__asm__ __volatile__ ("mfc0\t%0, $12" : "=r" (eie));
42+
eie = get_mips_cop_reg(0, COP0_REG_Status);
4243
if ((eie & 0x10000) == 0)
4344
{
4445
return 0x80008008; // ECPUDI

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