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[RV64_DYNAREC] Fixed GETEW delta parameter for ROL/ROR/RCL/RCR#3992

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ptitSeb merged 1 commit into
ptitSeb:mainfrom
1362525207:fix-rv64-getew
Jun 26, 2026
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[RV64_DYNAREC] Fixed GETEW delta parameter for ROL/ROR/RCL/RCR#3992
ptitSeb merged 1 commit into
ptitSeb:mainfrom
1362525207:fix-rv64-getew

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Problem: Incorrect address calculation for some rotate instructions with RIP-relative memory operands on RV64 dynarec.

Reason: The GETEW macro's delta parameter was incorrectly set to 1 instead of 0 for five 16-bit rotate opcodes in the 0xD1 and 0xD3 groups (ROR Ew,1; ROL Ew,CL; ROR Ew,CL; RCL Ew,CL; RCR Ew,CL). These instructions have no immediate operand, so delta must be 0. The wrong delta caused geted() to compute an off-by-one xRIP value, leading to incorrect effective addresses for RIP-relative memory operands.

Fix: Changed GETEW(x1, 1) → GETEW(x1, 0) for the five affected cases in dynarec_rv64_66.c.

Validation:

  • ctest: 34/34 passed on RV64 hardware.

@ptitSeb ptitSeb merged commit 7da44e5 into ptitSeb:main Jun 26, 2026
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