1+ // Copyright 2025 University of Bologna and Fondazione Chips-IT.
2+ // Licensed under the Apache License, Version 2.0, see LICENSE for details.
3+ // SPDX-License-Identifier: Apache-2.0
4+ //
5+ // Alberto Dequino <alberto.dequino@unibo.it>
6+ // Alex Marchioni <alex.marchioni@chips.it>
7+
8+ #include <stdint.h>
9+ #include "testinputs.h"
10+ #include "testoutputs.h"
11+ #include "Network.h"
12+
13+
14+
15+ int main (void ) {
16+
17+ uint32_t hartid = get_hartid ();
18+ uint32_t l1_tile_base = get_l1_base (hartid );
19+ uint32_t cycle_start , cycle_stop ;
20+
21+ /* Init tile's iDMA, Redmule, fsync, event-unit */
22+ idma_config_t idma_cfg = {.hartid = hartid };
23+ idma_controller_t idma_ctrl = {
24+ .base = NULL ,
25+ .cfg = & idma_cfg ,
26+ .api = & idma_api ,
27+ };
28+
29+ redmule_config_t redmule_cfg = {.hartid = hartid };
30+ redmule_controller_t redmule_ctrl = {
31+ .base = NULL ,
32+ .cfg = & redmule_cfg ,
33+ .api = & redmule_api ,
34+ };
35+
36+ fsync_config_t fsync_cfg = {.hartid = hartid };
37+ fsync_controller_t fsync_ctrl = {
38+ .base = NULL ,
39+ .cfg = & fsync_cfg ,
40+ .api = & fsync_api ,
41+ };
42+
43+ fsync_init (& fsync_ctrl );
44+ idma_init (& idma_ctrl );
45+ redmule_init (& redmule_ctrl );
46+
47+ eu_config_t eu_cfg = {.hartid = hartid };
48+ eu_controller_t eu_ctrl = {
49+ .base = NULL ,
50+ .cfg = & eu_cfg ,
51+ .api = & eu_api ,
52+ };
53+ eu_init (& eu_ctrl );
54+ eu_fsync_init (& eu_ctrl , 0 );
55+ eu_redmule_init (& eu_ctrl , 0 );
56+ eu_idma_init (& eu_ctrl , 0 );
57+
58+
59+ /* initialization */
60+ InitNetwork ();
61+
62+ fsync_sync_level (& fsync_ctrl , MAX_SYNC_LVL - 1 , 0 );
63+ eu_fsync_wait (& eu_ctrl , WAIT_MODE );
64+
65+ /* input copy */
66+ // TODO: check if memcopy is necessary!!!
67+ if (hartid == 0 ) {
68+ for (uint32_t buf = 0 ; buf < num_inputs ; buf ++ ) {
69+ memcpy (inputs [buf ], _inputs [buf ], inputs_bytes [buf ]);
70+ }
71+ }
72+
73+ fsync_sync_global (& fsync_ctrl );
74+ eu_fsync_wait (& eu_ctrl , WAIT_MODE );
75+
76+ /* execution */
77+ cycle_start = perf_get_cycles ();
78+ RunNetwork ();
79+ cycle_stop = perf_get_cycles ();
80+ printf ("id: %d, cycles: %d\n" , hartid , cycle_stop - cycle_start );
81+
82+ fsync_sync_global (& fsync_ctrl );
83+ eu_fsync_wait (& eu_ctrl , WAIT_MODE );
84+
85+ /* comparison */
86+ uint32_t errors = 0 ;
87+ uint32_t tests = 0 ;
88+ OUTPUTTYPE * computed_buf ;
89+ OUTPUTTYPE * expected_buf ;
90+ if (hartid == 0 ) {
91+ for (uint32_t buf = 0 ; buf < num_outputs ; buf ++ ) {
92+ tests += outputs_bytes [buf ] / sizeof (OUTPUTTYPE );
93+ for (uint32_t i = 0 ; i < outputs_bytes [buf ] / sizeof (OUTPUTTYPE ); i ++ ) {
94+ OUTPUTTYPE expected = ((OUTPUTTYPE * )_outputs [buf ])[i ];
95+ OUTPUTTYPE computed = ((OUTPUTTYPE * )outputs [buf ])[i ];
96+ OUTPUTTYPE diff = (computed > expected ) ? (computed - expected ) : (expected - computed );
97+ if (diff > 0 ) {
98+ if (ISOUTPUTFLOAT ) {
99+ // printf("Expected %10.6f computed: %10.6f diff: %10.6f (at index %u in output %u)\n",
100+ // expected, computed, diff, i, buf);
101+ } else {
102+ printf ("Expected %d computed: %d diff: %d (at index %u in output %u)\n" ,
103+ expected , computed , diff , i , buf );
104+ }
105+ errors ++ ;
106+ }
107+ }
108+ }
109+ printf ("Number of errors: %d\n" , errors );
110+ }
111+
112+ return errors ;
113+ }
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