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Aquaticfullerliyinrong
Aquaticfuller
and
liyinrong
authored
Merge Terapool-NoC adaptive routing supports (#112)
* hw: Add support for YX-Routing * hw: Add support for O1-Routing (XY/YX according to VC id) * hw: Add support for Odd-Even-Routing * [lint] All generate block statements must have a label. --------- Co-authored-by: Yinrong Li <yinrli@student.ethz.ch>
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3 files changed

Lines changed: 154 additions & 24 deletions

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‎hw/floo_pkg.sv‎

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@
1010
package floo_pkg;
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/// Currently Supported Routing Algorithms
13-
typedef enum logic[1:0] {
13+
typedef enum logic[2:0] {
1414
/// `IdTable` routing uses a table of routing rules to determine to
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/// which output port a packet should be routed, based on the
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/// destination ID encoded in the header of the flit. Every router
@@ -35,7 +35,10 @@ package floo_pkg;
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/// XY coordinates, which can be done with addressoffsets `XYAddrOffsetX`
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/// and `XYAddrOffsetY`, or by indexing the system address map `Sam`. This
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/// is controlled with the `UseIdTable` parameter.
38-
XYRouting
38+
XYRouting,
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YXRouting,
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OddEvenRouting,
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O1Routing
3942
} route_algo_e;
4043

4144
/// The directions in a 2D mesh network, mainly useful for indexing

‎hw/floo_route_select.sv‎

Lines changed: 75 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -121,6 +121,81 @@ if (RouteAlgo == IdTable) begin : gen_id_table
121121

122122
assign channel_o = channel_i;
123123

124+
end else if (RouteAlgo == YXRouting) begin : gen_yx_routing
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126+
id_t id_in;
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assign id_in = id_t'(channel_i.hdr.dst_id);
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always_comb begin : proc_route_sel
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route_sel = '0;
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if (id_in == xy_id_i) begin
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route_sel[Eject] = 1'b1;
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end else if (id_in.y == xy_id_i.y) begin
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if (id_in.x < xy_id_i.x) begin
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route_sel[West] = 1'b1;
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end else begin
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route_sel[East] = 1'b1;
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end
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end else begin
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if (id_in.y < xy_id_i.y) begin
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route_sel[South] = 1'b1;
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end else begin
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route_sel[North] = 1'b1;
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end
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end
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end
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assign channel_o = channel_i;
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150+
end else if (RouteAlgo == OddEvenRouting) begin : gen_oddeven_routing
151+
id_t id_src, id_dst;
152+
assign id_src = id_t'(channel_i.hdr.src_id);
153+
assign id_dst = id_t'(channel_i.hdr.dst_id);
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155+
always_comb begin : proc_route_sel
156+
route_sel = '0;
157+
if (xy_id_i == id_dst) begin
158+
route_sel[Eject] = 1'b1;
159+
end else if (xy_id_i.x == id_dst.x) begin //currently in the same column as destination
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if (xy_id_i.y < id_dst.y) begin
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route_sel[North] = 1'b1;
162+
end else begin
163+
route_sel[South] = 1'b1;
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end
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end else if (xy_id_i.x < id_dst.x) begin //eastbound traffic
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if (xy_id_i.y == id_dst.y) begin
167+
route_sel[East] = 1'b1;
168+
end else if (((xy_id_i.x % 2) == 1) || (xy_id_i.x == id_src.x)) begin
169+
if ((((id_dst.x) % 2 == 1) || ((id_dst.x - xy_id_i.x) != 1)) && (^channel_i)) begin
170+
route_sel[East] = 1'b1;
171+
end else begin
172+
if (xy_id_i.y < id_dst.y) begin
173+
route_sel[North] = 1'b1;
174+
end else begin
175+
route_sel[South] = 1'b1;
176+
end
177+
end
178+
end else begin
179+
assert ((id_dst.x % 2 == 1) || (id_dst.x - xy_id_i.x != 1));
180+
route_sel[East] = 1'b1;
181+
end
182+
end else begin //westbound traffic
183+
if (xy_id_i.y == id_dst.y) begin
184+
route_sel[West] = 1'b1;
185+
end else if (((xy_id_i.x % 2) == 0) && (^channel_i)) begin
186+
if (xy_id_i.y < id_dst.y) begin
187+
route_sel[North] = 1'b1;
188+
end else begin
189+
route_sel[South] = 1'b1;
190+
end
191+
end else begin
192+
route_sel[West] = 1'b1;
193+
end
194+
end
195+
end
196+
197+
assign channel_o = channel_i;
198+
124199
end else begin : gen_err
125200
// Unknown or unimplemented routing otherwise
126201
initial begin

‎hw/floo_router.sv‎

Lines changed: 74 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -83,28 +83,80 @@ module floo_router
8383
.ready_i ( in_ready[in_route][v_chan] )
8484
);
8585

86-
floo_route_select #(
87-
.NumRoutes ( NumOutput ),
88-
.flit_t ( flit_t ),
89-
.RouteAlgo ( RouteAlgo ),
90-
.IdWidth ( IdWidth ),
91-
.id_t ( id_t ),
92-
.NumAddrRules ( NumAddrRules ),
93-
.addr_rule_t ( addr_rule_t )
94-
) i_route_select (
95-
.clk_i,
96-
.rst_ni,
97-
.test_enable_i,
98-
99-
.xy_id_i ( xy_id_i ),
100-
.id_route_map_i ( id_route_map_i ),
101-
.channel_i ( in_data [in_route][v_chan] ),
102-
.valid_i ( in_valid [in_route][v_chan] ),
103-
.ready_i ( in_ready [in_route][v_chan] ),
104-
.channel_o ( in_routed_data[in_route][v_chan] ),
105-
.route_sel_o ( route_mask [in_route][v_chan] ),
106-
.route_sel_id_o ( )
107-
);
86+
if (RouteAlgo == O1Routing) begin: gen_o1routing
87+
88+
if (v_chan % 2 == 0) begin: gen_o1routing_xy
89+
floo_route_select #(
90+
.NumRoutes ( NumOutput ),
91+
.flit_t ( flit_t ),
92+
.RouteAlgo ( XYRouting ),
93+
.IdWidth ( IdWidth ),
94+
.id_t ( id_t ),
95+
.NumAddrRules ( NumAddrRules ),
96+
.addr_rule_t ( addr_rule_t )
97+
) i_route_select (
98+
.clk_i,
99+
.rst_ni,
100+
.test_enable_i,
101+
102+
.xy_id_i ( xy_id_i ),
103+
.id_route_map_i ( id_route_map_i ),
104+
.channel_i ( in_data [in_route][v_chan] ),
105+
.valid_i ( in_valid [in_route][v_chan] ),
106+
.ready_i ( in_ready [in_route][v_chan] ),
107+
.channel_o ( in_routed_data[in_route][v_chan] ),
108+
.route_sel_o ( route_mask [in_route][v_chan] )
109+
);
110+
end else begin: gen_o1routing_yx
111+
floo_route_select #(
112+
.NumRoutes ( NumOutput ),
113+
.flit_t ( flit_t ),
114+
.RouteAlgo ( YXRouting ),
115+
.IdWidth ( IdWidth ),
116+
.id_t ( id_t ),
117+
.NumAddrRules ( NumAddrRules ),
118+
.addr_rule_t ( addr_rule_t )
119+
) i_route_select (
120+
.clk_i,
121+
.rst_ni,
122+
.test_enable_i,
123+
124+
.xy_id_i ( xy_id_i ),
125+
.id_route_map_i ( id_route_map_i ),
126+
.channel_i ( in_data [in_route][v_chan] ),
127+
.valid_i ( in_valid [in_route][v_chan] ),
128+
.ready_i ( in_ready [in_route][v_chan] ),
129+
.channel_o ( in_routed_data[in_route][v_chan] ),
130+
.route_sel_o ( route_mask [in_route][v_chan] )
131+
);
132+
end
133+
134+
end else begin: gen_xyrouting
135+
136+
floo_route_select #(
137+
.NumRoutes ( NumOutput ),
138+
.flit_t ( flit_t ),
139+
.RouteAlgo ( RouteAlgo ),
140+
.IdWidth ( IdWidth ),
141+
.id_t ( id_t ),
142+
.NumAddrRules ( NumAddrRules ),
143+
.addr_rule_t ( addr_rule_t )
144+
) i_route_select (
145+
.clk_i,
146+
.rst_ni,
147+
.test_enable_i,
148+
149+
.xy_id_i ( xy_id_i ),
150+
.id_route_map_i ( id_route_map_i ),
151+
.channel_i ( in_data [in_route][v_chan] ),
152+
.valid_i ( in_valid [in_route][v_chan] ),
153+
.ready_i ( in_ready [in_route][v_chan] ),
154+
.channel_o ( in_routed_data[in_route][v_chan] ),
155+
.route_sel_o ( route_mask [in_route][v_chan] ),
156+
.route_sel_id_o ( )
157+
);
158+
159+
end
108160

109161
end
110162
end

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