vip: Update serial link as well

Author: fischeti

target/sim/src/vip_cheshire_soc.sv

@@ -717,21 +717,17 @@ module vip_cheshire_soc import cheshire_pkg::*; #(
   `AXI_ASSIGN_TO_RESP(slink_axi_slv_rsp, slink_slv)
 
   // Mirror instance of serial link, reflecting another chip
-  serial_link #(
-    .axi_req_t    ( axi_mst_req_t ),
-    .axi_rsp_t    ( axi_mst_rsp_t ),
-    .cfg_req_t    ( reg_req_t ),
-    .cfg_rsp_t    ( reg_rsp_t ),
-    .aw_chan_t    ( axi_mst_aw_chan_t ),
-    .ar_chan_t    ( axi_mst_ar_chan_t ),
-    .r_chan_t     ( axi_mst_r_chan_t  ),
-    .w_chan_t     ( axi_mst_w_chan_t  ),
-    .b_chan_t     ( axi_mst_b_chan_t  ),
-    .hw2reg_t     ( serial_link_single_channel_reg_pkg::serial_link_single_channel_hw2reg_t ),
-    .reg2hw_t     ( serial_link_single_channel_reg_pkg::serial_link_single_channel_reg2hw_t ),
-    .NumChannels  ( SlinkNumChan   ),
-    .NumLanes     ( SlinkNumLanes  ),
-    .MaxClkDiv    ( SlinkMaxClkDiv )
+    slink #(
+      .axi_req_t    ( axi_mst_req_t ),
+      .axi_rsp_t    ( axi_mst_rsp_t ),
+      .aw_chan_t    ( axi_mst_aw_chan_t ),
+      .ar_chan_t    ( axi_mst_ar_chan_t ),
+      .r_chan_t     ( axi_mst_r_chan_t  ),
+      .w_chan_t     ( axi_mst_w_chan_t  ),
+      .b_chan_t     ( axi_mst_b_chan_t  ),
+      .apb_req_t    ( apb_req_t ),
+      .apb_rsp_t    ( apb_resp_t ),
+      .NoRegCdc     ( 1'b1 ) // Since reg_clk_i is assigned to clk_i
   ) i_serial_link (
     .clk_i          ( clk   ),
     .rst_ni         ( rst_n ),
@@ -744,8 +740,8 @@ module vip_cheshire_soc import cheshire_pkg::*; #(
     .axi_in_rsp_o   ( slink_axi_mst_rsp ),
     .axi_out_req_o  ( slink_axi_slv_req ),
     .axi_out_rsp_i  ( slink_axi_slv_rsp ),
-    .cfg_req_i      ( '0 ),
-    .cfg_rsp_o      ( ),
+    .apb_req_i      ( '0 ),
+    .apb_rsp_o      ( ),
     .ddr_rcv_clk_i  ( slink_rcv_clk_o ),
     .ddr_rcv_clk_o  ( slink_rcv_clk_i ),
     .ddr_i          ( slink_o ),