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feat: add ACE coherence support in HPDCache subsystem
1 parent 64c17cc commit 8877fbc

22 files changed

Lines changed: 271 additions & 53 deletions

‎Bender.yml‎

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,8 @@ package:
77

88
# WT_DCACHE
99
dependencies:
10-
axi: { git: "https://github.com/pulp-platform/axi.git", version: 0.31.0 }
10+
axi: { git: "https://github.com/pulp-platform/axi.git", version: 0.39.9 }
11+
ace: { git: "https://github.com/pulp-platform/ace.git", rev: 1d14636 } # branch: multicore/devel
1112
common_cells:
1213
{ git: "https://github.com/pulp-platform/common_cells", version: 1.23.0 }
1314
fpnew: { git: "https://github.com/openhwgroup/cvfpu.git", rev: a74d99a32b } # branch: develop
@@ -173,6 +174,7 @@ sources:
173174
- core/cache_subsystem/hpdcache/rtl/src/utils/hpdcache_mem_resp_demux.sv
174175
- core/cache_subsystem/hpdcache/rtl/src/utils/hpdcache_mem_to_axi_read.sv
175176
- core/cache_subsystem/hpdcache/rtl/src/utils/hpdcache_mem_to_axi_write.sv
177+
- core/cache_subsystem/hpdcache/rtl/src/utils/hpdcache_snoop_to_ace_snoop.sv
176178
- core/cache_subsystem/hpdcache/rtl/src/utils/hpdcache_mem_req_read_arbiter.sv
177179
- core/cache_subsystem/hpdcache/rtl/src/utils/hpdcache_mem_req_write_arbiter.sv
178180
- core/cache_subsystem/hpdcache/rtl/src/common/hpdcache_demux.sv
@@ -186,6 +188,7 @@ sources:
186188
- core/cache_subsystem/hpdcache/rtl/src/common/hpdcache_decoder.sv
187189
- core/cache_subsystem/hpdcache/rtl/src/common/hpdcache_1hot_to_binary.sv
188190
- core/cache_subsystem/hpdcache/rtl/src/common/hpdcache_prio_1hot_encoder.sv
191+
- core/cache_subsystem/hpdcache/rtl/src/common/hpdcache_prio_bin_encoder.sv
189192
- core/cache_subsystem/hpdcache/rtl/src/common/hpdcache_sram.sv
190193
- core/cache_subsystem/hpdcache/rtl/src/common/hpdcache_sram_wbyteenable.sv
191194
- core/cache_subsystem/hpdcache/rtl/src/common/hpdcache_sram_wmask.sv
@@ -214,6 +217,8 @@ sources:
214217
- core/cache_subsystem/hpdcache/rtl/src/hpdcache_victim_sel.sv
215218
- core/cache_subsystem/hpdcache/rtl/src/hpdcache_wbuf.sv
216219
- core/cache_subsystem/hpdcache/rtl/src/hpdcache_flush.sv
220+
- core/cache_subsystem/hpdcache/rtl/src/hpdcache_cbuf.sv
221+
- core/cache_subsystem/hpdcache/rtl/src/hpdcache_snoop.sv
217222
# HPDCache integration
218223
- core/cache_subsystem/cva6_hpdcache_if_adapter.sv
219224
- core/cache_subsystem/cva6_hpdcache_subsystem_axi_arbiter.sv

‎core/cache_subsystem/cva6_hpdcache_subsystem.sv‎

Lines changed: 115 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,11 @@ module cva6_hpdcache_subsystem
3333
parameter type axi_w_chan_t = logic,
3434
parameter type axi_b_chan_t = logic,
3535
parameter type axi_r_chan_t = logic,
36+
parameter type snoop_ac_chan_t = logic,
37+
parameter type snoop_cr_chan_t = logic,
38+
parameter type snoop_cd_chan_t = logic,
39+
parameter type snoop_req_t = logic,
40+
parameter type snoop_resp_t = logic,
3641
parameter type noc_req_t = logic,
3742
parameter type noc_resp_t = logic,
3843
parameter type cmo_req_t = logic,
@@ -57,6 +62,20 @@ module cva6_hpdcache_subsystem
5762
input noc_resp_t noc_resp_i,
5863
// }}}
5964

65+
// ACE specific read and write acknowledgments
66+
// {{{
67+
output logic noc_rack_o,
68+
output logic noc_wack_o,
69+
// }}}
70+
71+
// ACE snoop port from coherent interconnect
72+
// {{{
73+
// snoop request (ACE)
74+
input snoop_req_t snoop_req_i,
75+
// snoop response (ACE)
76+
output snoop_resp_t snoop_resp_o,
77+
// }}}
78+
6079
// I$
6180
// {{{
6281
// Instruction cache enable - CSR_REGFILE
@@ -211,6 +230,10 @@ module cva6_hpdcache_subsystem
211230
userCfg.mshrSetsPerRam = CVA6Cfg.NrLoadBufEntries < 16 ? 1 : CVA6Cfg.NrLoadBufEntries / 2;
212231
userCfg.mshrRamByteEnable = 1'b1;
213232
userCfg.mshrUseRegbank = (CVA6Cfg.NrLoadBufEntries < 16);
233+
/*FIXME we should add additional CVA6 config parameters (cbufEntries)*/
234+
userCfg.cbufEntries = 4;
235+
/*FIXME we should add additional CVA6 config parameters (snoopFifoDepth)*/
236+
userCfg.snoopFifoDepth = CVA6Cfg.WtDcacheWbufDepth;
214237
userCfg.refillCoreRspFeedthrough = 1'b1;
215238
userCfg.refillFifoDepth = 2 * (CVA6Cfg.DCACHE_LINE_WIDTH / CVA6Cfg.AxiDataWidth);
216239
userCfg.wbufDirEntries = CVA6Cfg.WtDcacheWbufDepth;
@@ -231,6 +254,8 @@ module cva6_hpdcache_subsystem
231254
userCfg.wbEn =
232255
(CVA6Cfg.DCacheType == config_pkg::HPDCACHE_WB) ||
233256
(CVA6Cfg.DCacheType == config_pkg::HPDCACHE_WT_WB);
257+
userCfg.lowLatency = 1'b1;
258+
userCfg.coherenceEn = CVA6Cfg.DcacheCoherent;
234259
return userCfg;
235260
endfunction
236261

@@ -255,27 +280,44 @@ module cva6_hpdcache_subsystem
255280
`HPDCACHE_TYPEDEF_RSP_T(hpdcache_rsp_t, hpdcache_req_data_t, hpdcache_req_sid_t,
256281
hpdcache_req_tid_t);
257282

283+
localparam type hpdcache_nline_t = logic [HPDcacheCfg.nlineWidth-1:0];
284+
285+
`HPDCACHE_TYPEDEF_SNOOP_REQ_T(hpdcache_snoop_req_t, hpdcache_nline_t);
286+
`HPDCACHE_TYPEDEF_SNOOP_RESP_DATA_T(hpdcache_snoop_resp_data_t, hpdcache_mem_data_t);
287+
258288
typedef logic [HPDcacheCfg.u.wbufTimecntWidth-1:0] hpdcache_wbuf_timecnt_t;
259289

260-
logic dcache_read_ready;
261-
logic dcache_read_valid;
262-
hpdcache_mem_req_t dcache_read;
290+
logic dcache_read_ready;
291+
logic dcache_read_valid;
292+
hpdcache_mem_req_t dcache_read;
293+
294+
logic dcache_read_resp_ready;
295+
logic dcache_read_resp_valid;
296+
hpdcache_mem_resp_r_t dcache_read_resp;
297+
298+
logic dcache_write_ready;
299+
logic dcache_write_valid;
300+
hpdcache_mem_req_t dcache_write;
263301

264-
logic dcache_read_resp_ready;
265-
logic dcache_read_resp_valid;
266-
hpdcache_mem_resp_r_t dcache_read_resp;
302+
logic dcache_write_data_ready;
303+
logic dcache_write_data_valid;
304+
hpdcache_mem_req_w_t dcache_write_data;
267305

268-
logic dcache_write_ready;
269-
logic dcache_write_valid;
270-
hpdcache_mem_req_t dcache_write;
306+
logic dcache_write_resp_ready;
307+
logic dcache_write_resp_valid;
308+
hpdcache_mem_resp_w_t dcache_write_resp;
271309

272-
logic dcache_write_data_ready;
273-
logic dcache_write_data_valid;
274-
hpdcache_mem_req_w_t dcache_write_data;
310+
logic dcache_snoop_ready;
311+
logic dcache_snoop_valid;
312+
hpdcache_snoop_req_t dcache_snoop;
275313

276-
logic dcache_write_resp_ready;
277-
logic dcache_write_resp_valid;
278-
hpdcache_mem_resp_w_t dcache_write_resp;
314+
logic dcache_snoop_resp_meta_ready;
315+
logic dcache_snoop_resp_meta_valid;
316+
hpdcache_pkg::hpdcache_snoop_meta_t dcache_snoop_resp_meta;
317+
318+
logic dcache_snoop_resp_data_ready;
319+
logic dcache_snoop_resp_data_valid;
320+
hpdcache_snoop_resp_data_t dcache_snoop_resp_data;
279321

280322
cva6_hpdcache_wrapper #(
281323
.CVA6Cfg(CVA6Cfg),
@@ -304,7 +346,9 @@ module cva6_hpdcache_subsystem
304346
.hpdcache_req_t(hpdcache_req_t),
305347
.hpdcache_rsp_t(hpdcache_rsp_t),
306348
.hpdcache_wbuf_timecnt_t(hpdcache_wbuf_timecnt_t),
307-
.hpdcache_data_be_t(hpdcache_data_be_t)
349+
.hpdcache_data_be_t(hpdcache_data_be_t),
350+
.hpdcache_snoop_req_t(hpdcache_snoop_req_t),
351+
.hpdcache_snoop_resp_data_t(hpdcache_snoop_resp_data_t)
308352
) i_dcache (
309353
.clk_i(clk_i),
310354
.rst_ni(rst_ni),
@@ -331,6 +375,18 @@ module cva6_hpdcache_subsystem
331375
.hwpf_throttle_o(hwpf_throttle_o),
332376
.hwpf_status_o(hwpf_status_o),
333377

378+
.dcache_snoop_req_valid_i(dcache_snoop_valid),
379+
.dcache_snoop_req_ready_o(dcache_snoop_ready),
380+
.dcache_snoop_req_i(dcache_snoop),
381+
382+
.dcache_snoop_resp_meta_valid_o(dcache_snoop_resp_meta_valid),
383+
.dcache_snoop_resp_meta_ready_i(dcache_snoop_resp_meta_ready),
384+
.dcache_snoop_resp_meta_o(dcache_snoop_resp_meta),
385+
386+
.dcache_snoop_resp_data_ready_i(dcache_snoop_resp_data_ready),
387+
.dcache_snoop_resp_data_valid_o(dcache_snoop_resp_data_valid),
388+
.dcache_snoop_resp_data_o(dcache_snoop_resp_data),
389+
334390
.dcache_mem_req_read_ready_i(dcache_read_ready),
335391
.dcache_mem_req_read_valid_o(dcache_read_valid),
336392
.dcache_mem_req_read_o(dcache_read),
@@ -408,10 +464,52 @@ module cva6_hpdcache_subsystem
408464
.dcache_write_resp_o (dcache_write_resp),
409465

410466
.axi_req_o (noc_req_o),
411-
.axi_resp_i(noc_resp_i)
467+
.axi_resp_i(noc_resp_i),
468+
.ace_rack_o(noc_rack_o),
469+
.ace_wack_o(noc_wack_o)
412470
);
413471
// }}}
414472

473+
// Snoop port adapter
474+
// {{{
475+
476+
if (HPDcacheCfg.u.coherenceEn) begin : gen_snoop_adapter
477+
hpdcache_snoop_to_ace_snoop #(
478+
.HPDcacheCfg(HPDcacheCfg),
479+
.hpdcache_snoop_req_t(hpdcache_snoop_req_t),
480+
.hpdcache_snoop_resp_data_t(hpdcache_snoop_resp_data_t),
481+
.ac_chan_t(snoop_ac_chan_t),
482+
.cr_chan_t(snoop_cr_chan_t),
483+
.cd_chan_t(snoop_cd_chan_t)
484+
) i_snoop_adapter (
485+
.snoop_req_valid_o(dcache_snoop_valid),
486+
.snoop_req_ready_i(dcache_snoop_ready),
487+
.snoop_req_o(dcache_snoop),
488+
.snoop_rsp_meta_valid_i(dcache_snoop_resp_meta_valid),
489+
.snoop_rsp_meta_ready_o(dcache_snoop_resp_meta_ready),
490+
.snoop_rsp_meta_i(dcache_snoop_resp_meta),
491+
.snoop_rsp_data_valid_i(dcache_snoop_resp_data_valid),
492+
.snoop_rsp_data_ready_o(dcache_snoop_resp_data_ready),
493+
.snoop_rsp_data_i(dcache_snoop_resp_data),
494+
.ace_ac_valid_i(snoop_req_i.ac_valid),
495+
.ace_ac_ready_o(snoop_resp_o.ac_ready),
496+
.ace_ac_i(snoop_req_i.ac),
497+
.ace_cr_valid_o(snoop_resp_o.cr_valid),
498+
.ace_cr_ready_i(snoop_req_i.cr_ready),
499+
.ace_cr_o(snoop_resp_o.cr),
500+
.ace_cd_valid_o(snoop_resp_o.cd_valid),
501+
.ace_cd_ready_i(snoop_req_i.cd_ready),
502+
.ace_cd_o(snoop_resp_o.cd)
503+
);
504+
end else begin : gen_no_snoop_adapter
505+
assign dcache_snoop_valid = 1'b0;
506+
assign dcache_snoop = '0;
507+
assign dcache_snoop_resp_meta_ready = 1'b0;
508+
assign dcache_snoop_resp_data_ready = 1'b0;
509+
assign snoop_resp_o = '0;
510+
end
511+
// }}}
512+
415513
// Assertions
416514
// {{{
417515
// pragma translate_off

‎core/cache_subsystem/cva6_hpdcache_subsystem_axi_arbiter.sv‎

Lines changed: 27 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -84,7 +84,13 @@ module cva6_hpdcache_subsystem_axi_arbiter
8484
// AXI port to upstream memory/peripherals
8585
// {{{
8686
output axi_req_t axi_req_o,
87-
input axi_rsp_t axi_resp_i
87+
input axi_rsp_t axi_resp_i,
88+
// }}}
89+
90+
// ACE specific read and write acknowledgments
91+
// {{{
92+
output logic ace_rack_o,
93+
output logic ace_wack_o
8894
// }}}
8995
);
9096
// }}}
@@ -151,6 +157,7 @@ module cva6_hpdcache_subsystem_axi_arbiter
151157
assign icache_miss_req_wdata.mem_req_command = hpdcache_pkg::HPDCACHE_MEM_READ;
152158
assign icache_miss_req_wdata.mem_req_atomic = hpdcache_pkg::hpdcache_mem_atomic_e'(0);
153159
assign icache_miss_req_wdata.mem_req_cacheable = ~icache_miss_i.nc;
160+
assign icache_miss_req_wdata.mem_req_coherence = icache_miss_i.nc ? hpdcache_pkg::HPDCACHE_MEM_COHERENCE_READ_NO_SNOOP : hpdcache_pkg::HPDCACHE_MEM_COHERENCE_READ_CLEAN;
154161

155162

156163
// I$ response
@@ -287,15 +294,15 @@ module cva6_hpdcache_subsystem_axi_arbiter
287294

288295
// Read response demultiplexor
289296
// {{{
290-
logic mem_resp_read_ready;
291-
logic mem_resp_read_valid;
292-
hpdcache_mem_resp_r_t mem_resp_read;
297+
logic mem_resp_read_ready;
298+
logic mem_resp_read_valid;
299+
hpdcache_mem_resp_r_t mem_resp_read;
293300

294-
logic mem_resp_read_ready_arb[1:0];
295-
logic mem_resp_read_valid_arb[1:0];
296-
hpdcache_mem_resp_r_t mem_resp_read_arb [1:0];
301+
logic mem_resp_read_ready_arb [1:0];
302+
logic mem_resp_read_valid_arb [1:0];
303+
hpdcache_mem_resp_r_t mem_resp_read_arb [1:0];
297304

298-
mem_resp_rt_t mem_resp_read_rt;
305+
mem_resp_rt_t mem_resp_read_rt;
299306

300307
always_comb begin
301308
for (int i = 0; i < MEM_RESP_RT_DEPTH; i++) begin
@@ -330,6 +337,16 @@ module cva6_hpdcache_subsystem_axi_arbiter
330337
assign dcache_read_resp_valid_o = mem_resp_read_valid_arb[1];
331338
assign dcache_read_resp_o = mem_resp_read_arb[1];
332339
assign mem_resp_read_ready_arb[1] = dcache_read_resp_ready_i;
340+
341+
always_ff @(posedge clk_i or negedge rst_ni) begin
342+
if (!rst_ni) ace_rack_o <= 1'b0;
343+
else ace_rack_o <= (mem_resp_read_valid && mem_resp_read_ready && mem_resp_read.mem_resp_r_last);
344+
end
345+
346+
always_ff @(posedge clk_i or negedge rst_ni) begin
347+
if (!rst_ni) ace_wack_o <= 1'b0;
348+
else ace_wack_o <= (dcache_write_resp_valid_o && dcache_write_resp_ready_i);
349+
end
333350
// }}}
334351

335352
// I$ miss pending
@@ -348,6 +365,7 @@ module cva6_hpdcache_subsystem_axi_arbiter
348365
// {{{
349366

350367
hpdcache_mem_to_axi_write #(
368+
.aceEn (CVA6Cfg.DcacheCoherent),
351369
.hpdcache_mem_req_t (hpdcache_mem_req_t),
352370
.hpdcache_mem_req_w_t (hpdcache_mem_req_w_t),
353371
.hpdcache_mem_resp_w_t(hpdcache_mem_resp_w_t),
@@ -381,6 +399,7 @@ module cva6_hpdcache_subsystem_axi_arbiter
381399
);
382400

383401
hpdcache_mem_to_axi_read #(
402+
.aceEn (CVA6Cfg.DcacheCoherent),
384403
.hpdcache_mem_req_t (hpdcache_mem_req_t),
385404
.hpdcache_mem_resp_r_t(hpdcache_mem_resp_r_t),
386405
.ar_chan_t (axi_ar_chan_t),

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