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docs+make: Mention SAIF as a compact alternative to VCD for power estimation (#315)
Co-authored-by: Luca Colagrande <luca.colagrande3@gmail.com>
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docs/ug/tutorial.md

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@@ -427,37 +427,54 @@ Running a physical simulation is then no different from running a functional sim
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During physical implementation, the tools are able to independently generate area and timing numbers. For a complete PPA analysis, you will want to include power estimates as well.
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Power numbers are extremely dependent on the switching activity in your circuit, which in turn depends on the stimuli you feed in to your DUT, so you are in charge of providing this information to the tools. The switching activity is typically recorded in the form of a [VCD](https://en.wikipedia.org/wiki/Value_change_dump) file, and can be generated by most RTL simulators.
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Power numbers are extremely dependent on the switching activity in your circuit, which in turn depends on the stimuli you feed in to your DUT, so you are in charge of providing this information to the tools. The switching activity can be recorded either as a [VCD](https://en.wikipedia.org/wiki/Value_change_dump) file or as a more compact [SAIF](https://en.wikipedia.org/wiki/Switching_Activity_Interchange_Format) (Switching Activity Interchange Format) — both carry the switching data PrimeTime needs. SAIF files are typically ~300× smaller than VCDs; pick VCD if you also want waveforms for debugging.
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To do so, set the `VCD_DUMP` flag when building the physical simulation model:
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```shell
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make TECH=gf12 VCD_DUMP=1 DEBUG=ON vsim
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```
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To record switching activity during the simulation, set the corresponding flag when building the physical simulation model:
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=== "VCD"
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```shell
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make TECH=gf12 VCD_DUMP=1 DEBUG=ON vsim
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```
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=== "SAIF"
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```shell
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make TECH=gf12 SAIF_DUMP=1 DEBUG=ON vsim
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```
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!!! danger
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When using QuestaSim for VCD generation, you must build the model with the `DEBUG=ON` flag, to ensure that all nets are preserved during compilation, preventing them from being optimized away. This guarantees that the VCD file contains switching activity for all nets in your circuit.
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When using QuestaSim for VCD or SAIF generation, you must build the model with the `DEBUG=ON` flag, to ensure that all nets are preserved during compilation, preventing them from being optimized away.
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When you run a simulation, the simulator will now automatically create a `vcd` subdirectory within the _simulation directory_, where a VCD file is generated.
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When you run a simulation, the simulator will automatically create a `vcd` or `saif` subdirectory within the _simulation directory_, where the recording is written.
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Most often you are not interested in estimating the power of an entire simulation, but only of a specific section, e.g. while executing a part of a kernel computation.
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You can pass start and end times (in ns) for VCD recording to the simulation as environment variables:
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Most often you are not interested in estimating the power of an entire simulation, but only of a specific section, e.g. while executing a part of a kernel computation. You can pass start and end times (in ns) for the recording to the simulation as environment variables:
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```shell
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VCD_START=127 VCD_END=8898 snitch_cluster.vsim sw/kernels/blas/axpy/build/axpy.elf
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```
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=== "VCD"
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```shell
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VCD_START=127 VCD_END=8898 snitch_cluster.vsim sw/kernels/blas/axpy/build/axpy.elf
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```
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=== "SAIF"
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```shell
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SAIF_START=127 SAIF_END=8898 snitch_cluster.vsim sw/kernels/blas/axpy/build/axpy.elf
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```
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!!! note
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Variable assignments must preceed the executable in a shell command to be interpreted as environment variable assignments. Note that environment variables set this way only persist for the current command.
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A benefit of RTL simulations is that they are cycle-accurate. You can thus use them as a reference to find the start and end times of interest with the help of the simulation traces (unavailable during physical simulation), and directly apply these to the physical simulation.
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With a VCD file at your disposal, you can now estimate the power consumption of your circuit. Run the following command:
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```shell
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make SIM_DIR=<path_to_simulation_directory> power
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```
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You need to point the command to the _simulation directory_ in which the VCD dump was generated, for it to find the VCD file.
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With a recording at your disposal, you can now estimate the power consumption of your circuit:
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=== "VCD"
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```shell
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make SIM_DIR=<path_to_simulation_directory> power
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```
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=== "SAIF"
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```shell
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make SIM_DIR=<path_to_simulation_directory> power-saif
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```
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You need to point the command to the _simulation directory_ in which the recording was generated, for it to find the file.
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!!! note
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Since the actual simulation command is run in a different directory, you need to point to the _simulation directory_ using an absolute path.
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Once the command terminates, you will find power reports in the `nonfree/gf12/synopsys/reports` folder, from which you can extract relevant power numbers.
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Once the command terminates, you will find power reports in the `nonfree/gf12/synopsys/reports` folder, from which you can extract relevant power numbers. The nonfree repository's README covers additional options, including how to derive a SAIF from an existing VCD via Synopsys's `vcd2saif` utility.

make/vsim.mk

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@@ -53,9 +53,12 @@ SN_COMMON_BENDER_FLAGS += -t ihp13 -t netlist
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SN_COMMON_BENDER_FLAGS += -DSIMULATION
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endif
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# VCD_DUMP flag enables VCD dump generation
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# VCD_DUMP / SAIF_DUMP flags enable VCD or SAIF dump generation. Only
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# one should be set at a time; if both are set, VCD_DUMP has priority.
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ifeq ($(VCD_DUMP), 1)
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SN_VSIM_FLAGS += -do "source $(SN_ROOT)/nonfree/gf12/modelsim/vcd.tcl"
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else ifeq ($(SAIF_DUMP), 1)
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SN_VSIM_FLAGS += -do "source $(SN_ROOT)/nonfree/gf12/modelsim/saif.tcl"
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else
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SN_VSIM_FLAGS += -do "run -a"
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endif

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