Skip to content

Commit ddfa12a

Browse files
collucacolluca
committed
hw: Adapt cvfpu configuration
1 parent 9d76323 commit ddfa12a

2 files changed

Lines changed: 58 additions & 13 deletions

File tree

‎hw/snitch_cluster/src/snitch_cluster_pkg.sv.tpl‎

Lines changed: 54 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -162,43 +162,65 @@ package ${cfg['cluster']['name']}_pkg;
162162
${cfg['cluster']['timing']['lat_comp_fp16']}, // FP16
163163
${cfg['cluster']['timing']['lat_comp_fp8']}, // FP8
164164
${cfg['cluster']['timing']['lat_comp_fp16_alt']}, // FP16alt
165-
${cfg['cluster']['timing']['lat_comp_fp8_alt']} // FP8alt
165+
${cfg['cluster']['timing']['lat_comp_fp8_alt']}, // FP8alt
166+
1, // FP6
167+
1, // FP6alt
168+
1 // FP4
166169
},
167-
'{1, 1, 1, 1, 1, 1}, // DIVSQRT
170+
'{1, 1, 1, 1, 1, 1, 1, 1, 1}, // DIVSQRT
168171
'{${cfg['cluster']['timing']['lat_noncomp']},
169172
${cfg['cluster']['timing']['lat_noncomp']},
170173
${cfg['cluster']['timing']['lat_noncomp']},
171174
${cfg['cluster']['timing']['lat_noncomp']},
172175
${cfg['cluster']['timing']['lat_noncomp']},
173-
${cfg['cluster']['timing']['lat_noncomp']}}, // NONCOMP
176+
${cfg['cluster']['timing']['lat_noncomp']},
177+
1,
178+
1,
179+
1}, // NONCOMP
174180
'{${cfg['cluster']['timing']['lat_conv']},
175181
${cfg['cluster']['timing']['lat_conv']},
176182
${cfg['cluster']['timing']['lat_conv']},
177183
${cfg['cluster']['timing']['lat_conv']},
178184
${cfg['cluster']['timing']['lat_conv']},
179-
${cfg['cluster']['timing']['lat_conv']}}, // CONV
185+
${cfg['cluster']['timing']['lat_conv']},
186+
1,
187+
1,
188+
1}, // CONV
180189
'{${cfg['cluster']['timing']['lat_sdotp']},
181190
${cfg['cluster']['timing']['lat_sdotp']},
182191
${cfg['cluster']['timing']['lat_sdotp']},
183192
${cfg['cluster']['timing']['lat_sdotp']},
184193
${cfg['cluster']['timing']['lat_sdotp']},
185-
${cfg['cluster']['timing']['lat_sdotp']}} // DOTP
194+
${cfg['cluster']['timing']['lat_sdotp']},
195+
1,
196+
1,
197+
1}, // DOTP
198+
'{1, 1, 1, 1, 1, 1, 1, 1, 1} // MXDOTP
186199
},
187200
UnitTypes: '{'{fpnew_pkg::MERGED,
188201
fpnew_pkg::MERGED,
189202
fpnew_pkg::MERGED,
190203
fpnew_pkg::MERGED,
191204
fpnew_pkg::MERGED,
192-
fpnew_pkg::MERGED}, // FMA
205+
fpnew_pkg::MERGED,
206+
fpnew_pkg::DISABLED,
207+
fpnew_pkg::DISABLED,
208+
fpnew_pkg::DISABLED}, // FMA
193209
% if c["Xdiv_sqrt"]:
194210
'{fpnew_pkg::MERGED,
195211
fpnew_pkg::MERGED,
196212
fpnew_pkg::MERGED,
197213
fpnew_pkg::MERGED,
198214
fpnew_pkg::MERGED,
199-
fpnew_pkg::MERGED}, // DIVSQRT
215+
fpnew_pkg::MERGED,
216+
fpnew_pkg::DISABLED,
217+
fpnew_pkg::DISABLED,
218+
fpnew_pkg::DISABLED}, // DIVSQRT
200219
% else:
201220
'{fpnew_pkg::DISABLED,
221+
fpnew_pkg::DISABLED,
222+
fpnew_pkg::DISABLED,
223+
fpnew_pkg::DISABLED,
202224
fpnew_pkg::DISABLED,
203225
fpnew_pkg::DISABLED,
204226
fpnew_pkg::DISABLED,
@@ -210,28 +232,49 @@ package ${cfg['cluster']['name']}_pkg;
210232
fpnew_pkg::PARALLEL,
211233
fpnew_pkg::PARALLEL,
212234
fpnew_pkg::PARALLEL,
213-
fpnew_pkg::PARALLEL}, // NONCOMP
235+
fpnew_pkg::PARALLEL,
236+
fpnew_pkg::DISABLED,
237+
fpnew_pkg::DISABLED,
238+
fpnew_pkg::DISABLED}, // NONCOMP
214239
'{fpnew_pkg::MERGED,
215240
fpnew_pkg::MERGED,
216241
fpnew_pkg::MERGED,
217242
fpnew_pkg::MERGED,
218243
fpnew_pkg::MERGED,
219-
fpnew_pkg::MERGED}, // CONV
244+
fpnew_pkg::MERGED,
245+
fpnew_pkg::DISABLED,
246+
fpnew_pkg::DISABLED,
247+
fpnew_pkg::DISABLED}, // CONV
220248
% if c["xfdotp"]:
221249
'{fpnew_pkg::MERGED,
222250
fpnew_pkg::MERGED,
223251
fpnew_pkg::MERGED,
224252
fpnew_pkg::MERGED,
225253
fpnew_pkg::MERGED,
226-
fpnew_pkg::MERGED}}, // DOTP
254+
fpnew_pkg::MERGED,
255+
fpnew_pkg::DISABLED,
256+
fpnew_pkg::DISABLED,
257+
fpnew_pkg::DISABLED}, // DOTP
227258
% else:
228259
'{fpnew_pkg::DISABLED,
229260
fpnew_pkg::DISABLED,
230261
fpnew_pkg::DISABLED,
231262
fpnew_pkg::DISABLED,
232263
fpnew_pkg::DISABLED,
233-
fpnew_pkg::DISABLED}}, // DOTP
264+
fpnew_pkg::DISABLED,
265+
fpnew_pkg::DISABLED,
266+
fpnew_pkg::DISABLED,
267+
fpnew_pkg::DISABLED}, // DOTP
234268
% endif
269+
'{fpnew_pkg::DISABLED,
270+
fpnew_pkg::DISABLED,
271+
fpnew_pkg::DISABLED,
272+
fpnew_pkg::DISABLED,
273+
fpnew_pkg::DISABLED,
274+
fpnew_pkg::DISABLED,
275+
fpnew_pkg::DISABLED,
276+
fpnew_pkg::DISABLED,
277+
fpnew_pkg::DISABLED}}, // MXDOTP
235278
PipeConfig: fpnew_pkg::${cfg['cluster']['timing']['fpu_pipe_config']}
236279
}${',\n' if not loop.last else '\n'}\
237280
% endfor

‎hw/snitch_fp_ss/src/snitch_fpu.sv‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -54,8 +54,10 @@ module snitch_fpu import snitch_pkg::*; #(
5454
Width: fpnew_pkg::maximum(FLEN, 32),
5555
EnableVectors: XFVEC,
5656
EnableNanBox: 1'b1,
57-
FpFmtMask: {RVF, RVD, XF16, XF8, XF16ALT, XF8ALT},
58-
IntFmtMask: {XFVEC && (XF8 || XF8ALT), XFVEC && (XF16 || XF16ALT), 1'b1, 1'b0}
57+
FpFmtMask: {RVF, RVD, XF16, XF8, XF16ALT, XF8ALT, 1'b0, 1'b0, 1'b0},
58+
IntFmtMask: {XFVEC && (XF8 || XF8ALT), XFVEC && (XF16 || XF16ALT), 1'b1, 1'b0},
59+
MxFpFmtMask: '0,
60+
MxIntFmtMask: '0
5961
};
6062

6163
fpnew_top #(

0 commit comments

Comments
 (0)