feat(vcr-sel): ship cmp→select fusion default-on — v0.13.0 (VCR-SEL-004, #428, #242) (#454)

The byte-changing default-on flip the cmp→select arc has been building toward.
ARM compare→select lowering now predicates the moves on the compare's own flags
(`cmp; mov{c}; mov{invert(c)}`) instead of materializing+re-testing a boolean,
−2 insns/select. .text shrinks on every function with a select (control_step
354→324, flight_seam 1016→902, flight_seam_flat 1240→1122; −262 B across the
frozen fixtures); gale measured gust_mix 2.375×→2.125× vs LLVM.

Results preserved — validated three independent ways BEFORE shipping:
1. named-anchor differentials re-run with fusion ON, same commit as the re-freeze:
   control_step still 0x00210A55 (13/13), flat+inlined flight_algo still 0x07FDF307.
2. unicorn execution oracle running the two-move mov{invert(c)} arm (cmp-select-
   oracle CI job, 11/11 off==on==wasmtime) — its unfused baseline now opts out via
   SYNTH_NO_CMP_SELECT_FUSE.
3. gale's gale_decider_diff sweep: 8 verified primitives, 10,596 cases,
   native ≡ unfused ≡ fused.

- arm_backend.rs: fusion default-on; escape hatch SYNTH_NO_CMP_SELECT_FUSE=1.
- frozen_codegen_bytes.rs: ARM goldens re-frozen to the fused .text (RV32 +
  signed_div_const unchanged — fusion is ARM-only / 0 sites); harness now locks
  the shipped (fused) path and removes the opt-out var.
- version 0.12.0 → 0.13.0 (pin sweep: all path-deps + MODULE.bazel); CHANGELOG;
  VCR-SEL-004 status approved → implemented.

Pending follow-up (gale, post-ship): on-silicon G474RE DWT cycle no-regression —
user waived it as a release gate in favor of the qemu+sweep+oracle evidence.

Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>

Author: avrabe

CHANGELOG.md

@@ -7,6 +7,29 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ## [Unreleased]
 
+## [0.13.0] - 2026-06-24
+
+**cmp→select fusion is now DEFAULT-ON (VCR-SEL-004, #428, epic #242).** The ARM
+backend's compare→select lowering no longer materializes a boolean and re-tests
+it (`cmp; SetCond; cmp #0; movne; moveq`); it predicates the moves directly on
+the compare's own flags (`cmp; mov{c}; mov{invert(c)}`), −2 instructions per
+select. This is a **byte-changing** release: `.text` shrinks on every function
+with a select (control_step 354→324 B, flight_seam 1016→902, flight_seam_flat
+1240→1122; −262 B across the frozen fixtures), and gale's `gust_mix` measured
+2.375×→2.125× vs LLVM with a 132→116 B function.
+
+Execution **results are preserved** — validated three ways before shipping: (1)
+the named-anchor differentials re-run with fusion on (control_step still
+`0x00210A55`, flat+inlined flight_algo still `0x07FDF307`); (2) a unicorn
+execution oracle that runs the two-move `mov{invert(c)}` arm (`cmp-select-oracle`
+CI job, 11/11 result-identical); (3) gale's `gale_decider_diff` sweep across all
+8 verified primitives (10,596 cases, native ≡ unfused ≡ fused). The byte gates
+were re-frozen to the fused `.text` on this commit.
+
+**Escape hatch:** `SYNTH_NO_CMP_SELECT_FUSE=1` reverts to the pre-fusion lowering.
+**Pending follow-up:** the on-silicon G474RE DWT cycle no-regression check is
+tracked post-ship (gale); the qemu `-icount` proxy showed a monotonic win.
+
 ## [0.12.0] - 2026-06-23
 
 **DWARF SOURCE-LINE DEBUGGING — `--debug-line` (VCR-DBG-001, #394, epic #242).**

Cargo.lock

@@ -27,7 +27,7 @@ resolver = "2"
 # semver to publish, so the convention now catches up: workspace
 # version follows the release tag, bumped pre-tag in the release
 # checklist. See docs/release-process.md.
-version = "0.12.0"
+version = "0.13.0"
 edition = "2024"
 rust-version = "1.88"
 authors = ["PulseEngine Team"]

Cargo.toml

@@ -7,7 +7,7 @@ module(
     name = "synth",
     # Kept in lockstep with [workspace.package] version in Cargo.toml.
     # Both are bumped pre-tag — see docs/release-process.md.
-    version = "0.12.0",
+    version = "0.13.0",
 )
 
 # Bazel dependencies

MODULE.bazel

@@ -737,7 +737,16 @@ artifacts:
       exhaustive sweep); precond (2) (G474RE silicon no-regression) still OWED —
       gale's bench is thumbv7m/qemu today — flip stays held on it (user call
       2026-06-23: keep the silicon gate; close the exec gap first).
-    status: approved
+      FLIP SHIPPED v0.13.0 (2026-06-24, #428): default-on landed. User authorized
+      shipping on the qemu+sweep+oracle evidence and WAIVING precond (2) for the
+      release (gale takes the on-silicon G474RE DWT no-regression as a tracked
+      post-ship follow-up). Re-froze the fused .text on the same commit the
+      named-anchor differentials were re-run on (control_step preserved 0x00210A55,
+      flat+inlined flight_algo preserved 0x07FDF307; .text −262 B across the frozen
+      fixtures). Escape hatch SYNTH_NO_CMP_SELECT_FUSE=1 reverts the lowering.
+      SCOPE: the select half shipped; the br_if→predicated-branch half remains a
+      separate follow-up (branch consumers unmodeled by reg_effect).
+    status: implemented
     tags: [codegen, selector, peephole, compare-select, flag-fusion, gale-209, perf, track-b, vcr-oracle-001]
     links:
       - type: derives-from

artifacts/verified-codegen-roadmap.yaml

@@ -11,6 +11,6 @@ categories.workspace = true
 description = "aWsm backend integration for the Synth compiler"
 
 [dependencies]
-synth-core = { path = "../synth-core", version = "0.12.0" }
+synth-core = { path = "../synth-core", version = "0.13.0" }
 anyhow.workspace = true
 thiserror.workspace = true

crates/synth-backend-awsm/Cargo.toml

@@ -11,8 +11,8 @@ categories.workspace = true
 description = "RISC-V encoder, ELF builder, PMP allocator, and bare-metal startup for synth"
 
 [dependencies]
-synth-core = { path = "../synth-core", version = "0.12.0" }
-synth-synthesis = { path = "../synth-synthesis", version = "0.12.0" }
+synth-core = { path = "../synth-core", version = "0.13.0" }
+synth-synthesis = { path = "../synth-synthesis", version = "0.13.0" }
 anyhow.workspace = true
 thiserror.workspace = true
 tracing.workspace = true

crates/synth-backend-riscv/Cargo.toml

@@ -11,6 +11,6 @@ categories.workspace = true
 description = "Wasker backend integration for the Synth compiler"
 
 [dependencies]
-synth-core = { path = "../synth-core", version = "0.12.0" }
+synth-core = { path = "../synth-core", version = "0.13.0" }
 anyhow.workspace = true
 thiserror.workspace = true

crates/synth-backend-wasker/Cargo.toml

@@ -15,7 +15,7 @@ default = ["arm-cortex-m"]
 arm-cortex-m = ["synth-synthesis"]
 
 [dependencies]
-synth-core = { path = "../synth-core", version = "0.12.0" }
-synth-synthesis = { path = "../synth-synthesis", version = "0.12.0", optional = true }
+synth-core = { path = "../synth-core", version = "0.13.0" }
+synth-synthesis = { path = "../synth-synthesis", version = "0.13.0", optional = true }
 anyhow.workspace = true
 thiserror.workspace = true

crates/synth-backend/Cargo.toml

@@ -433,15 +433,20 @@ fn compile_wasm_to_arm(
     // sound (flags reused only when nothing clobbers them in the window; the
     // boolean deleted only when provably dead) — see `fuse_cmp_select`.
     //
-    // BEHIND `SYNTH_CMP_SELECT_FUSE=1` while it is validated against the
-    // differential oracle + gale's on-target gust_codegen_bench (G474RE). Off by
-    // default ⇒ a literal no-op ⇒ every fixture stays bit-identical
-    // (control_step 0x00210A55 / flat+inlined flight_algo 0x07FDF307 / divseam).
-    // The default-on flip is the held byte-changing step, gated on silicon.
-    let arm_instrs = if std::env::var("SYNTH_CMP_SELECT_FUSE").is_ok() {
+    // DEFAULT-ON as of v0.13.0 (#428): cmp→select fusion ships by default. The
+    // byte-changing flip is validated by (a) the unicorn execution oracle that runs
+    // the two-move `mov{invert(c)}` arm (cmp_select_two_move_differential.py), (b)
+    // gale's gale_decider_diff 10,596-case sweep across all 8 verified primitives
+    // (native ≡ flag-off ≡ flag-on = 0x88e73178d232bcf5), and (c) the named-anchor
+    // differentials re-run with fusion ON — control_step still 0x00210A55, flat+
+    // inlined flight_algo still 0x07FDF307 (results preserved; bytes deliberately
+    // changed, re-frozen on this commit). Escape hatch: `SYNTH_NO_CMP_SELECT_FUSE=1`
+    // reverts to the pre-fusion lowering. The on-silicon G474RE DWT no-regression
+    // check is a tracked post-ship follow-up (gale owns it).
+    let arm_instrs = if std::env::var("SYNTH_NO_CMP_SELECT_FUSE").is_err() {
         // The rewritten stream is identical to `fuse_cmp_select`'s 2-tuple form;
         // the extra `two_move` count is diagnostic only (the fusion census /
-        // blast-radius datum for the flip decision — #7 made that arm reachable).
+        // blast-radius datum — #7 made that arm reachable).
         let (out, fused, two_move) =
             synth_synthesis::liveness::fuse_cmp_select_with_stats(&arm_instrs);
         if std::env::var("SYNTH_FUSE_STATS").is_ok() {