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ArcaneNibbledlech
ArcaneNibble
authored and
dlech
committed
pbio/drv/uart/uart_ev3_pru_lib: Further remove PRU1 support
Removes PRU1 register definitions and code which depends on them
1 parent 0caa317 commit fdbc6e5

2 files changed

Lines changed: 34 additions & 210 deletions

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‎lib/pbio/drv/uart/uart_ev3_pru_lib/suart_api.c‎

Lines changed: 34 additions & 170 deletions
Original file line numberDiff line numberDiff line change
@@ -477,15 +477,8 @@ int16_t pru_softuart_setbaud
477477
/* channel starts from 0 and uart instance starts from 1 */
478478
chNum = (hUart->uartNum * SUART_NUM_OF_CHANNELS_PER_SUART) - 2;
479479

480-
if (hUart->uartNum <= 4) {
481-
/* PRU0 */
482-
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
483-
} else {
484-
/* PRU1 */
485-
pruOffset = PRU_SUART_PRU1_CH0_OFFSET;
486-
/* First 8 channel corresponds to PRU0 */
487-
chNum -= 8;
488-
}
480+
/* PRU0 */
481+
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
489482

490483

491484

@@ -552,15 +545,8 @@ int16_t pru_softuart_setdatabits
552545
/* channel starts from 0 and uart instance starts from 1 */
553546
chNum = (hUart->uartNum * SUART_NUM_OF_CHANNELS_PER_SUART) - 2;
554547

555-
if (hUart->uartNum <= 4) {
556-
/* PRU0 */
557-
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
558-
} else {
559-
/* PRU1 */
560-
pruOffset = PRU_SUART_PRU1_CH0_OFFSET;
561-
/* First 8 channel corresponds to PRU0 */
562-
chNum -= 8;
563-
}
548+
/* PRU0 */
549+
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
564550

565551

566552
if (txDataBits != 0) {
@@ -632,15 +618,8 @@ int16_t pru_softuart_setconfig(suart_handle hUart, suart_config *configUart) {
632618
/* channel starts from 0 and uart instance starts from 1 */
633619
chNum = (hUart->uartNum * SUART_NUM_OF_CHANNELS_PER_SUART) - 2;
634620

635-
if (hUart->uartNum <= 4) {
636-
/* PRU0 */
637-
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
638-
} else {
639-
/* PRU1 */
640-
pruOffset = PRU_SUART_PRU1_CH0_OFFSET;
641-
/* First 8 channel corresponds to PRU0 */
642-
chNum -= 8;
643-
}
621+
/* PRU0 */
622+
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
644623

645624
/* Configuring the Transmit part of the given UART */
646625
if (configUart->TXSerializer != PRU_SUART_SERIALIZER_NONE) {
@@ -755,15 +734,8 @@ int16_t pru_softuart_getTxDataLen(suart_handle hUart) {
755734
/* channel starts from 0 and uart instance starts from 1 */
756735
chNum = (hUart->uartNum * SUART_NUM_OF_CHANNELS_PER_SUART) - 2;
757736

758-
if (hUart->uartNum <= 4) {
759-
/* PRU0 */
760-
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
761-
} else {
762-
/* PRU1 */
763-
pruOffset = PRU_SUART_PRU1_CH0_OFFSET;
764-
/* First 8 channel corresponds to PRU0 */
765-
chNum -= 8;
766-
}
737+
/* PRU0 */
738+
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
767739

768740
/* Transmit channel number is (UartNum * 2) - 2 */
769741

@@ -795,15 +767,8 @@ int16_t pru_softuart_getRxDataLen(suart_handle hUart) {
795767
/* channel starts from 0 and uart instance starts from 1 */
796768
chNum = (hUart->uartNum * SUART_NUM_OF_CHANNELS_PER_SUART) - 2;
797769

798-
if (hUart->uartNum <= 4) {
799-
/* PRU0 */
800-
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
801-
} else {
802-
/* PRU1 */
803-
pruOffset = PRU_SUART_PRU1_CH0_OFFSET;
804-
/* First 8 channel corresponds to PRU0 */
805-
chNum -= 8;
806-
}
770+
/* PRU0 */
771+
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
807772

808773
chNum++;
809774

@@ -843,15 +808,8 @@ int16_t pru_softuart_getconfig(suart_handle hUart, suart_config *configUart) {
843808
chNum = (hUart->uartNum * SUART_NUM_OF_CHANNELS_PER_SUART) - 2;
844809

845810

846-
if (hUart->uartNum <= 4) {
847-
/* PRU0 */
848-
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
849-
} else {
850-
/* PRU1 */
851-
pruOffset = PRU_SUART_PRU1_CH0_OFFSET;
852-
/* First 8 channel corresponds to PRU0 */
853-
chNum -= 8;
854-
}
811+
/* PRU0 */
812+
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
855813

856814
/* Configuring the Transmit part of the given UART */
857815
/* Configuring TX serializer */
@@ -944,17 +902,9 @@ int16_t pru_softuart_write
944902
/* channel starts from 0 and uart instance starts from 1 */
945903
chNum = (hUart->uartNum * SUART_NUM_OF_CHANNELS_PER_SUART) - 2;
946904

947-
if (hUart->uartNum <= 4) {
948-
/* PRU0 */
949-
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
950-
pru_num = hUart->uartNum;
951-
} else {
952-
/* PRU1 */
953-
pruOffset = PRU_SUART_PRU1_CH0_OFFSET;
954-
/* First 8 channel corresponds to PRU0 */
955-
chNum -= 8;
956-
pru_num = hUart->uartNum;
957-
}
905+
/* PRU0 */
906+
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
907+
pru_num = hUart->uartNum;
958908

959909
/* Writing data length to SUART channel register */
960910
offset =
@@ -1010,17 +960,9 @@ int16_t pru_softuart_read
1010960
/* channel starts from 0 and uart instance starts from 1 */
1011961
chNum = (hUart->uartNum * SUART_NUM_OF_CHANNELS_PER_SUART) - 2;
1012962

1013-
if (hUart->uartNum <= 4) {
1014-
/* PRU0 */
1015-
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
1016-
pru_num = hUart->uartNum;
1017-
} else {
1018-
/* PRU1 */
1019-
pruOffset = PRU_SUART_PRU1_CH0_OFFSET;
1020-
/* First 8 channel corresponds to PRU0 */
1021-
chNum -= 8;
1022-
pru_num = hUart->uartNum;
1023-
}
963+
/* PRU0 */
964+
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
965+
pru_num = hUart->uartNum;
1024966
chNum++;
1025967

1026968
/* Writing data length to SUART channel register */
@@ -1088,15 +1030,8 @@ int16_t pru_softuart_read_data(
10881030
/* channel starts from 0 and uart instance starts from 1 */
10891031
chNum = (hUart->uartNum * SUART_NUM_OF_CHANNELS_PER_SUART) - 2;
10901032

1091-
if (hUart->uartNum <= 4) {
1092-
/* PRU0 */
1093-
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
1094-
} else {
1095-
/* PRU1 */
1096-
pruOffset = PRU_SUART_PRU1_CH0_OFFSET;
1097-
/* First 8 channel corresponds to PRU0 */
1098-
chNum -= 8;
1099-
}
1033+
/* PRU0 */
1034+
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
11001035
chNum++;
11011036

11021037
/* Get the data pointer from channel RX data pointer */
@@ -1201,15 +1136,8 @@ int16_t pru_softuart_stopReceive(suart_handle hUart) {
12011136
/* channel starts from 0 and uart instance starts from 1 */
12021137
chNum = (hUart->uartNum * SUART_NUM_OF_CHANNELS_PER_SUART) - 2;
12031138

1204-
if (hUart->uartNum <= 4) {
1205-
/* PRU0 */
1206-
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
1207-
} else {
1208-
/* PRU1 */
1209-
pruOffset = PRU_SUART_PRU1_CH0_OFFSET;
1210-
/* First 8 channel corresponds to PRU0 */
1211-
chNum -= 8;
1212-
}
1139+
/* PRU0 */
1140+
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
12131141
chNum++;
12141142

12151143
/* read the existing value of status flag */
@@ -1253,15 +1181,8 @@ int16_t pru_softuart_getTxStatus(suart_handle hUart) {
12531181
chNum = (hUart->uartNum * SUART_NUM_OF_CHANNELS_PER_SUART) - 2;
12541182

12551183

1256-
if (hUart->uartNum <= 4) {
1257-
/* PRU0 */
1258-
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
1259-
} else {
1260-
/* PRU1 */
1261-
pruOffset = PRU_SUART_PRU1_CH0_OFFSET;
1262-
/* First 8 channel corresponds to PRU0 */
1263-
chNum -= 8;
1264-
}
1184+
/* PRU0 */
1185+
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
12651186

12661187
offset =
12671188
pruOffset + (chNum * SUART_NUM_OF_BYTES_PER_CHANNEL) +
@@ -1285,15 +1206,8 @@ int16_t pru_softuart_clrTxStatus(suart_handle hUart) {
12851206
/* channel starts from 0 and uart instance starts from 1 */
12861207
chNum = (hUart->uartNum * SUART_NUM_OF_CHANNELS_PER_SUART) - 2;
12871208

1288-
if (hUart->uartNum <= 4) {
1289-
/* PRU0 */
1290-
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
1291-
} else {
1292-
/* PRU1 */
1293-
pruOffset = PRU_SUART_PRU1_CH0_OFFSET;
1294-
/* First 8 channel corresponds to PRU0 */
1295-
chNum -= 8;
1296-
}
1209+
/* PRU0 */
1210+
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
12971211

12981212
offset =
12991213
pruOffset + (chNum * SUART_NUM_OF_BYTES_PER_CHANNEL) +
@@ -1322,15 +1236,8 @@ int16_t pru_softuart_getRxStatus(suart_handle hUart) {
13221236
/* channel starts from 0 and uart instance starts from 1 */
13231237
chNum = (hUart->uartNum * SUART_NUM_OF_CHANNELS_PER_SUART) - 2;
13241238

1325-
if (hUart->uartNum <= 4) {
1326-
/* PRU0 */
1327-
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
1328-
} else {
1329-
/* PRU1 */
1330-
pruOffset = PRU_SUART_PRU1_CH0_OFFSET;
1331-
/* First 8 channel corresponds to PRU0 */
1332-
chNum -= 8;
1333-
}
1239+
/* PRU0 */
1240+
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
13341241
chNum++;
13351242

13361243
offset =
@@ -1359,15 +1266,8 @@ int16_t pru_softuart_clrRxFifo(suart_handle hUart) {
13591266
/* channel starts from 0 and uart instance starts from 1 */
13601267
chNum = (hUart->uartNum * SUART_NUM_OF_CHANNELS_PER_SUART) - 2;
13611268

1362-
if (hUart->uartNum <= 4) {
1363-
/* PRU0 */
1364-
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
1365-
} else {
1366-
/* PRU1 */
1367-
pruOffset = PRU_SUART_PRU1_CH0_OFFSET;
1368-
/* First 8 channel corresponds to PRU0 */
1369-
chNum -= 8;
1370-
}
1269+
/* PRU0 */
1270+
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
13711271
chNum++;
13721272

13731273
/* Reset the number of bytes read into the FIFO */
@@ -1414,15 +1314,8 @@ int16_t pru_softuart_clrRxStatus(suart_handle hUart) {
14141314
/* channel starts from 0 and uart instance starts from 1 */
14151315
chNum = (hUart->uartNum * SUART_NUM_OF_CHANNELS_PER_SUART) - 2;
14161316

1417-
if (hUart->uartNum <= 4) {
1418-
/* PRU0 */
1419-
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
1420-
} else {
1421-
/* PRU1 */
1422-
pruOffset = PRU_SUART_PRU1_CH0_OFFSET;
1423-
/* First 8 channel corresponds to PRU0 */
1424-
chNum -= 8;
1425-
}
1317+
/* PRU0 */
1318+
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
14261319
chNum++;
14271320

14281321
offset =
@@ -1503,15 +1396,8 @@ int32_t pru_intr_clr_isrstatus(uint16_t uartNum, uint32_t txrxmode) {
15031396
/* channel starts from 0 and uart instance starts from 1 */
15041397
chnNum = (uartNum * SUART_NUM_OF_CHANNELS_PER_SUART) - 2;
15051398

1506-
if (uartNum <= 4) {
1507-
/* PRU0 */
1508-
offset = PRU_SUART_PRU0_ISR_OFFSET + 1;
1509-
} else {
1510-
/* PRU1 */
1511-
offset = PRU_SUART_PRU1_ISR_OFFSET + 1;
1512-
/* First 8 channel corresponds to PRU0 */
1513-
chnNum -= 8;
1514-
}
1399+
/* PRU0 */
1400+
offset = PRU_SUART_PRU0_ISR_OFFSET + 1;
15151401

15161402
if (2 == txrxmode) {
15171403
chnNum++;
@@ -1532,9 +1418,6 @@ int16_t suart_arm_to_pru_intr(uint16_t uartNum) {
15321418
if ((uartNum > 0) && (uartNum <= 4)) {
15331419
/* PRU0 SYS_EVT32 */
15341420
u32value = 0x20;
1535-
} else if ((uartNum > 4) && (uartNum <= 8)) {
1536-
/* PRU1 SYS_EVT33 */
1537-
u32value = 0x21;
15381421
} else {
15391422
return SUART_INVALID_UART_NUM;
15401423
}
@@ -1830,12 +1713,6 @@ int32_t suart_intr_setmask(uint16_t uartNum,
18301713

18311714
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
18321715
offset = PRU_SUART_PRU0_IMR_OFFSET;
1833-
} else if ((uartNum > 4) && (uartNum <= 8)) {
1834-
/* PRU1 */
1835-
offset = PRU_SUART_PRU1_IMR_OFFSET;
1836-
pruOffset = PRU_SUART_PRU1_CH0_OFFSET;
1837-
/* First 8 channel corresponds to PRU0 */
1838-
chnNum -= 8;
18391716
} else {
18401717
return SUART_INVALID_UART_NUM;
18411718
}
@@ -1940,12 +1817,6 @@ int32_t suart_intr_clrmask(uint16_t uartNum,
19401817

19411818
pruOffset = PRU_SUART_PRU0_CH0_OFFSET;
19421819
offset = PRU_SUART_PRU0_IMR_OFFSET;
1943-
} else if ((uartNum > 4) && (uartNum <= 8)) {
1944-
/* PRU1 */
1945-
offset = PRU_SUART_PRU1_IMR_OFFSET;
1946-
pruOffset = PRU_SUART_PRU1_CH0_OFFSET;
1947-
/* First 8 channel corresponds to PRU0 */
1948-
chnNum -= 8;
19491820
} else {
19501821
return SUART_INVALID_UART_NUM;
19511822
}
@@ -2042,11 +1913,6 @@ int32_t suart_intr_getmask(uint16_t uartNum,
20421913
if ((uartNum > 0) && (uartNum <= 4)) {
20431914

20441915
offset = PRU_SUART_PRU0_IMR_OFFSET;
2045-
} else if ((uartNum > 4) && (uartNum <= 8)) {
2046-
/* PRU1 */
2047-
offset = PRU_SUART_PRU1_IMR_OFFSET;
2048-
/* First 8 channel corresponds to PRU0 */
2049-
chnNum -= 8;
20501916
} else {
20511917
return SUART_INVALID_UART_NUM;
20521918
}
@@ -2079,8 +1945,6 @@ static int32_t suart_set_pru_id(uint32_t pru_no) {
20791945

20801946
if (0 == pru_no) {
20811947
offset = PRU_SUART_PRU0_ID_ADDR;
2082-
} else if (1 == pru_no) {
2083-
offset = PRU_SUART_PRU1_ID_ADDR;
20841948
} else {
20851949
return PRU_SUART_FAILURE;
20861950
}

‎lib/pbio/drv/uart/uart_ev3_pru_lib/suart_pru_regs.h‎

Lines changed: 0 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -78,46 +78,6 @@
7878
#define PRU_SUART_PRU0_DELAY_OFFSET (0x0086)
7979
#define PRU_SUART_PRU0_IDLE_TIMEOUT_OFFSET (0x0088)
8080

81-
/* ********* PRU 1 Macros ************* */
82-
#define PRU_SUART_PRU1_CH0_OFFSET (0x2000)
83-
/** Channel 0 */
84-
85-
#define PRU_SUART_PRU1_CH1_OFFSET (0x2010)
86-
/** Channel 1 */
87-
88-
#define PRU_SUART_PRU1_CH2_OFFSET (0x2020)
89-
/** Channel 2 */
90-
91-
#define PRU_SUART_PRU1_CH3_OFFSET (0x2030)
92-
/** Channel 3 */
93-
94-
#define PRU_SUART_PRU1_CH4_OFFSET (0x2040)
95-
/** Channel 4 */
96-
97-
#define PRU_SUART_PRU1_CH5_OFFSET (0x2050)
98-
/** Channel 5 */
99-
100-
#define PRU_SUART_PRU1_CH6_OFFSET (0x2060)
101-
/** Channel 6 */
102-
103-
#define PRU_SUART_PRU1_CH7_OFFSET (0x2070)
104-
/** Channel 7 */
105-
106-
#define PRU_SUART_PRU1_IMR_OFFSET (0x2080)
107-
/** Interrupt Mask Register */
108-
109-
#define PRU_SUART_PRU1_ISR_OFFSET (0x2082)
110-
/** Interrupt Status Register */
111-
112-
#define PRU_SUART_PRU1_ID_ADDR (0x2084)
113-
/** PRU ID Register */
114-
115-
#define PRU_SUART_PRU1_RX_TX_MODE (0x2085)
116-
117-
#define PRU_SUART_PRU1_DELAY_OFFSET (0x2086)
118-
119-
#define PRU_SUART_PRU1_IDLE_TIMEOUT_OFFSET (0x2088)
120-
12181

12282
/* SUART Channel Control Register bit descriptions */
12383
#define PRU_SUART_CH_CTRL_MODE_SHIFT 0x0000

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