Fix SLEEF preprocessor macro name to match ATen vec headers

[kimishpatel]

Stack from ghstack (oldest at bottom):

• temp changes to enable benchmarking on device via adb #18719
• Add xplat cxx_binary target for bench_transposed_cache benchmark #18718
• Add non-flash SDPA path gated by ET_USE_UNFUSED_SDPA #18717
• Add ONNX Runtime GQA-style SDPA benchmark #18716
• Add GEMM-based standard SDPA benchmark and fix custom_sdpa_out signature #18715
• Support separate K/V seq dim in custom_sdpa op #18714
• Add --no_transposed_cache CLI flag for export pipeline #18713
• Plumb transposed cache config through export pipeline #18712
• Add benchmarks for transposed vs standard KV cache layout #18711
• temp hack #18710
• Add support for transposed kv cache in all variants of custom kv cache #18709
• Add contig requirement to aot binding for llm custom ops #18708
• Add support for seq at dim=2 #18707
• Make kv cache update op support transposed cache #18706
• Add xplat cxx_binary target for bench_sdpa #18705
• Use unfused SDPA for short sequences (q_len <= 128 or kv_len <= 128) #18651
• Limit softmax to causally-valid elements in cpu_sdpa #18650
• Add quantized input support to cpu_sdpa #18649
• [Executorch] Add non-flash SDPA for decode #18648
• Add ONNX Runtime GQA-style SDPA benchmark #18647
• Add GEMM-based standard SDPA benchmark #18646
• -> Fix SLEEF preprocessor macro name to match ATen vec headers #18645

The ATen NEON vectorized math headers (vec128_float_neon.h) check for
AT_BUILD_ARM_VEC256_WITH_SLEEF to enable SLEEF intrinsics for exp(),
log(), etc. ExecuTorch's get_vec_preprocessor_flags() was defining
ET_BUILD_ARM_VEC256_WITH_SLEEF (wrong prefix), so the USE_SLEEF macro
always took the fallback path: map(std::exp) — scalar exp called
per-element with full vector load/store overhead wrapping it.

With this fix, Vectorized::exp() correctly dispatches to
Sleef_expf4_u10 on ARM, which is the intended behavior.

Differential Revision: D96044314

[pytorch-bot]

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