diff --git a/backends/qualcomm/README.md b/backends/qualcomm/README.md index 7f877749000..9395220d483 100644 --- a/backends/qualcomm/README.md +++ b/backends/qualcomm/README.md @@ -19,7 +19,7 @@ Please check `generate_qnn_executorch_compiler_spec()` in The supported Qualcomm SoCs are detailed in `QcomChipset`. Please navigate to [qc_schema.py](serialization/qc_schema.py). ### Adding more supported Chipset -Currently, users cannot add additional chipset models because the chipset ID is not accessible to community users. If you have specific chipset models you wish to add, please contact one of the authors in the `Code Reviews` section at the bottom of this page. +The SoC model integer value needed to add new chipsets can be found in the QNN AI Engine Direct SDK documentation under "Supported Snapdragon Devices". The SoC model value is listed as "SOC Model" in that table and must match `QNN_SOC_MODEL_*` constants from the SDK's `QnnTypes.h`. ### Supported Inference Type - Quantized diff --git a/backends/qualcomm/serialization/qc_compiler_spec.fbs b/backends/qualcomm/serialization/qc_compiler_spec.fbs index 57708c959e9..1041a980337 100644 --- a/backends/qualcomm/serialization/qc_compiler_spec.fbs +++ b/backends/qualcomm/serialization/qc_compiler_spec.fbs @@ -51,7 +51,9 @@ enum QcomChipset: int { SM8450 = 36, SM8475 = 42, SM8550 = 43, + SM8635 = 68, SM8650 = 57, + SM8735 = 85, SM8750 = 69, SM8850 = 87, SSG2115P = 46, diff --git a/backends/qualcomm/serialization/qc_schema.py b/backends/qualcomm/serialization/qc_schema.py index aeffbc069b6..9ba3cb22a54 100644 --- a/backends/qualcomm/serialization/qc_schema.py +++ b/backends/qualcomm/serialization/qc_schema.py @@ -58,7 +58,9 @@ class QcomChipset(IntEnum): SM8450 = 36 # v69 SM8475 = 42 # v69 SM8550 = 43 # v73 + SM8635 = 68 # v73 SM8650 = 57 # v75 + SM8735 = 85 # v79 SM8750 = 69 # v79 SM8850 = 87 # v81 SSG2115P = 46 # v73 @@ -89,7 +91,9 @@ class SocInfo: QcomChipset.SM8475: SocInfo(QcomChipset.SM8475, HtpInfo(HtpArch.V69, 8)), QcomChipset.SM8550: SocInfo(QcomChipset.SM8550, HtpInfo(HtpArch.V73, 8)), QcomChipset.SA8255: SocInfo(QcomChipset.SA8255, HtpInfo(HtpArch.V73, 8)), + QcomChipset.SM8635: SocInfo(QcomChipset.SM8635, HtpInfo(HtpArch.V73, 8)), QcomChipset.SM8650: SocInfo(QcomChipset.SM8650, HtpInfo(HtpArch.V75, 8)), + QcomChipset.SM8735: SocInfo(QcomChipset.SM8735, HtpInfo(HtpArch.V79, 8)), QcomChipset.SM8750: SocInfo(QcomChipset.SM8750, HtpInfo(HtpArch.V79, 8)), QcomChipset.SM8850: SocInfo( QcomChipset.SM8850, HtpInfo(HtpArch.V81, 8), LpaiInfo(LpaiHardwareVersion.V6) diff --git a/backends/qualcomm/utils/utils.py b/backends/qualcomm/utils/utils.py index bf11230065c..c80d1df5207 100644 --- a/backends/qualcomm/utils/utils.py +++ b/backends/qualcomm/utils/utils.py @@ -1138,7 +1138,9 @@ def generate_qnn_executorch_compiler_spec( # noqa: C901 SM8450 (Snapdragon 8 Gen 1) SM8475(Snapdragon 8 Gen 1+) SM8550(Snapdragon 8 Gen 2) + SM8635(Snapdragon 8s Gen 3) SM8650(Snapdragon 8 Gen 3) + SM8735(Snapdragon 8s Gen 4) SM8750(Snapdragon 8 Elite) SM8850(Snapdragon 8 Elite Gen 5) backend_options: Options required by different backends. @@ -1263,7 +1265,9 @@ def get_soc_to_htp_arch_map(): "SM8475": HtpArch.V69, "SM8550": HtpArch.V73, "SA8255": HtpArch.V73, + "SM8635": HtpArch.V73, "SM8650": HtpArch.V75, + "SM8735": HtpArch.V79, "SM8750": HtpArch.V79, "SM8850": HtpArch.V81, "SSG2115P": HtpArch.V73, @@ -1296,7 +1300,9 @@ def get_soc_to_chipset_map(): "SM8475": QcomChipset.SM8475, "SM8550": QcomChipset.SM8550, "SA8255": QcomChipset.SA8255, + "SM8635": QcomChipset.SM8635, "SM8650": QcomChipset.SM8650, + "SM8735": QcomChipset.SM8735, "SM8750": QcomChipset.SM8750, "SM8850": QcomChipset.SM8850, "SSG2115P": QcomChipset.SSG2115P,