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Manual merge of PR stack #20602

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Merged
SS-JIA merged 4 commits into from
Jun 29, 2026
Merged

Manual merge of PR stack #20602

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1b51970
[ET-VK][ops] Add bitwise_or / logical_or operators
Jun 26, 2026
5d6e622
[ET-VK][ops] Add eq.Scalar operator
Jun 26, 2026
f03c77b
[ET-VK][quantized] Select dq8ca zero-point binding by its allocated d…
Jun 26, 2026
eddb4a9
[ET-VK][patterns] Fuse torchao 4-bit quantized embedding to embedding…
Jun 26, 2026
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41 changes: 20 additions & 21 deletions backends/vulkan/op_registry.py
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Original file line number Diff line number Diff line change
Expand Up @@ -294,8 +294,16 @@ def register_comparison_ops():
# =============================================================================


@update_features(exir_ops.edge.aten.bitwise_and.Tensor)
def register_bitwise_and():
@update_features(
[
exir_ops.edge.aten.bitwise_and.Tensor,
exir_ops.edge.aten.bitwise_or.Tensor,
exir_ops.edge.aten.bitwise_not.default,
exir_ops.edge.aten.logical_and.default,
exir_ops.edge.aten.logical_or.default,
]
)
def register_bool_binary_ops():
return OpFeatures(
inputs_storage=utils.ANY_STORAGE,
inputs_dtypes=utils.BOOL_T,
Expand All @@ -304,36 +312,27 @@ def register_bitwise_and():
)


@update_features(exir_ops.edge.aten.bitwise_not.default)
def register_bitwise_not():
return OpFeatures(
inputs_storage=utils.ANY_STORAGE,
inputs_dtypes=utils.BOOL_T,
supports_resize=True,
supports_highdim=True,
)
# =============================================================================
# BinaryScalarOp.cpp
# =============================================================================


@update_features(exir_ops.edge.aten.logical_and.default)
def register_logical_and():
@update_features(exir_ops.edge.aten.pow.Tensor_Scalar)
def register_pow_tensor_scalar():
return OpFeatures(
inputs_storage=utils.ANY_STORAGE,
inputs_dtypes=utils.BOOL_T,
inputs_dtypes=utils.FP_T,
supports_resize=True,
supports_highdim=True,
)


# =============================================================================
# BinaryScalarOp.cpp
# =============================================================================


@update_features(exir_ops.edge.aten.pow.Tensor_Scalar)
def register_pow_tensor_scalar():
@update_features(exir_ops.edge.aten.eq.Scalar)
def register_eq_scalar():
return OpFeatures(
inputs_storage=utils.ANY_STORAGE,
inputs_dtypes=utils.FP_T,
inputs_dtypes=utils.FP_INT_T,
outputs_dtypes=utils.BOOL_T,
supports_resize=True,
supports_highdim=True,
)
Expand Down
1 change: 1 addition & 0 deletions backends/vulkan/patterns/BUCK
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Expand Up @@ -18,6 +18,7 @@ fbcode_target(_kind = runtime.python_library,
"quantized_pixel_shuffle.py",
"quantized_unary.py",
"rms_norm.py",
"weight_packing_utils.py",
"sdpa.py",
"select_as_symint.py",
],
Expand Down
9 changes: 5 additions & 4 deletions backends/vulkan/patterns/quantized_convolution.py
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Expand Up @@ -183,7 +183,7 @@ def find_quantized_convolution_patterns(


@register_pattern_replacement("quantized_convolution")
def make_q8ta_conv2d_custom_op(
def make_q8ta_conv2d_custom_op( # noqa: C901
ep: ExportedProgram,
graph_module: torch.fx.GraphModule,
match: QuantizedConvolutionMatch,
Expand Down Expand Up @@ -249,9 +249,10 @@ def make_q8ta_conv2d_custom_op(
# Need to make sure that OC dim is a multiple of 4 so that data load/stores are well
# aligned with texel boundaries. Add padding to align to the next multiple of 4 if
# needed.
utils.align_width_and_update_state_dict(
ep, match.weight_node, weight_tensor, force_update=True
)
if utils.register_param_mutation(ep, match.weight_node, "8 bit conv2d weight"):
utils.align_width_and_update_state_dict(
ep, match.weight_node, weight_tensor, force_update=True
)
utils.align_width_and_update_state_dict(
ep, match.weight_scales_node, weight_scales_tensor
)
Expand Down
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