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aushasre123jprakash-qc
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FROMLIST: arm64: dts: qcom: monaco-pmics: Add ADC support for PMM8620AU
Add ADC nodes for PMM8620AU PMIC instances (SID 0 and SID 2) present on the Monaco platform. Each ADC node exposes the following ADC channels: - DIE_TEMP: PMIC die temperature channel - VPH_PWR: Battery/supply voltage channel Link: https://lore.kernel.org/all/20260430-adc5_gen3_dt-v1-3-ab2bb40fd490@oss.qualcomm.com/ Signed-off-by: Ayyagari Ushasreevalli <aushasre@qti.qualcomm.com> Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
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arch/arm64/boot/dts/qcom/monaco-pmics.dtsi

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@@ -5,6 +5,7 @@
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/spmi/spmi.h>
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#include "qcom-adc5-gen3.h"
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&spmi_bus {
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pmm8620au_0: pmic@0 {
@@ -20,6 +21,27 @@
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interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>;
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};
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pmm8620au_0_adc: adc@8000 {
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compatible = "qcom,spmi-adc5-gen3";
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reg = <0x8000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <0x0 0x80 0x1 IRQ_TYPE_EDGE_RISING>;
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#io-channel-cells = <1>;
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channel@3 {
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reg = <ADC5_GEN3_DIE_TEMP(0)>;
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label = "pmm8620au_0_die_temp";
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qcom,pre-scaling = <1 1>;
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};
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channel@8e {
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reg = <ADC5_GEN3_VPH_PWR(0)>;
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label = "pmm8620au_0_vph_pwr";
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qcom,pre-scaling = <1 3>;
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};
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};
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pmm8620au_0_gpios: gpio@8800 {
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compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";
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reg = <0x8800>;
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#address-cells = <1>;
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#size-cells = <0>;
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pmm8650au_1_adc: adc@8000 {
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compatible = "qcom,spmi-adc5-gen3";
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reg = <0x8000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <0x2 0x80 0x1 IRQ_TYPE_EDGE_RISING>;
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#io-channel-cells = <1>;
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channel@203 {
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reg = <ADC5_GEN3_DIE_TEMP(2)>;
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label = "pmm8650au_1_die_temp";
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qcom,pre-scaling = <1 1>;
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};
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channel@28e {
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reg = <ADC5_GEN3_VPH_PWR(2)>;
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label = "pmm8650au_1_vph_pwr";
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qcom,pre-scaling = <1 3>;
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};
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};
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pmm8650au_1_gpios: gpio@8800 {
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compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";
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reg = <0x8800>;

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