FROMLIST: arm64: dts: qcom: talos: Add GEM_NOC interconnect for adreno SMMU

On Talos platforms, the Adreno SMMU requires a bandwidth vote on
the GEM_NOC path (MASTER_GPU_TCU -> SLAVE_EBI1) before its registers
are accessible. Without this vote, the SMMU may become unreachable,
leading to intermittent probe failures and runtime issues.

Add the required interconnect to ensure reliable register access.

Link: https://lore.kernel.org/all/20260526-smmu_interconnect_addition-v2-6-2a6d8ca30d63@oss.qualcomm.com/
Signed-off-by: Bibek Kumar Patro <bibek.patro@oss.qualcomm.com>

Author: bibekpatro

arch/arm64/boot/dts/qcom/talos.dtsi

@@ -2095,6 +2095,8 @@
 				      "iface";
 			power-domains = <&gpucc CX_GDSC>;
 			dma-coherent;
+			interconnects = <&gem_noc MASTER_GPU_TCU QCOM_ICC_TAG_ALWAYS
+					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
 		};
 
 		stm@6002000 {