ASoC: qcom: lpass-macro: Add LPASS codec v4.0 support for Shikra

Shikra (QCM2290) carries a Bolero v4.0 LPASS codec that extends the
existing VA and RX macro hardware in several ways.  Wire up the new
platform while keeping all changes strictly gated so that no existing
platform is affected.

VA macro changes:
- Add LPASS_CODEC_VERSION_4_0 to the version enum and version-string
  helper in lpass-macro-common.h.
- Introduce a dedicated shikra_va_data match-data struct that pre-sets
  codec version to 4.0 and marks bypass_fs_control, avoiding the need
  to read the version from hardware registers before clocks are up.
- Add new register definitions for v4.0-only hardware blocks:
    * SWR GP-IN/GP-OUT channel registers (0x00E0-0x00FC)
    * Extended ADC MUX4-7 CFG0/1 (0x0120-0x013C) for 8-DMIC support
    * ADC MUXx CFG2 extension for all 8 muxes (0x0140-0x015C)
    * SWR INTR_CTRL registers (0x0340-0x03D0)
    * TX PATH CFG2 per decimator (0x0430/0x04B0/0x0530/0x05B0)
    * Adaptive filter blocks ADPT0-3 (0x0800-0x09A4)
    * ALT TOP configuration registers (0x1000-0x1140)
- Split register defaults: common defaults stay in va_defaults[]; all
  v4.0-only defaults move to a new va_4_0_defaults[] array.  The probe
  function builds the regmap config dynamically (mirroring rx-macro),
  merging va_4_0_defaults only for v4.0 and setting max_register to
  VA_MAX_OFFSET (0x1240) vs VA_MAX_OFFSET_PRE_4_0 (0x07A8) accordingly.
- Guard va_is_rw_register() and va_is_volatile_register() so the new
  INTR_CTRL, MUX4-7, CFG2, TX_PATH_CFG2, ADPT, and ALT_TOP cases are
  only reachable when the codec version is 4.0.
- Add bypass_fs_control bool to va_macro_data and va_macro structs.
  Gate the FS counter bit[7] toggle in va_clk_rsc_fs_gen_request()
  behind va->bypass_fs_control instead of a version comparison.
- Add fsgen_gate_ops_4_0 clk_ops with recalc_rate (parent/2) used only
  for v4.0; the base fsgen_gate_ops is unchanged for all other platforms.
- Fix a pre-existing bug where the TX1 and TX3 reg_default entries for
  TX_PATH_CFG2 incorrectly referenced CDC_VA_TX0_TX_PATH_CFG2 (0x0430)
  instead of their own addresses (0x04B0 and 0x05B0 respectively).

RX macro changes:
- Add LPASS_CODEC_VERSION_4_0 fall-through to the v2.5 register-set,
  control, widget, and probe stride/defaults selection paths, since the
  RX macro register layout is compatible with the 2.5 variant.
- Add bypass_fs_control bool to rx_macro struct; set it from the new
  LPASS_MACRO_FLAG_BYPASS_FS_CONTROL flag in rx_macro_probe().
- Gate the FS counter bit[7] toggle in rx_macro_mclk_enable() behind
  rx->bypass_fs_control instead of a version comparison.
- Add qcom,shikra-lpass-rx-macro DT match entry with both
  LPASS_MACRO_FLAG_HAS_NPL_CLOCK and LPASS_MACRO_FLAG_BYPASS_FS_CONTROL.

Common header changes:
- Add LPASS_MACRO_FLAG_BYPASS_FS_CONTROL BIT(2) to lpass-macro-common.h
  to signal that the FS counter control bit[7] must be toggled during
  mclk enable.  This is a platform capability flag, not a version check,
  so it can be set independently of codec version in future platforms.

Signed-off-by: Mohammad Rafi Shaik <mohs@qti.qualcomm.com>

Author: mohsRafi

sound/soc/codecs/lpass-macro-common.h

@@ -10,6 +10,8 @@
 #define LPASS_MACRO_FLAG_HAS_NPL_CLOCK		BIT(0)
 /* The soundwire block should be internally reset at probe */
 #define LPASS_MACRO_FLAG_RESET_SWR		BIT(1)
+/* FS counter control bit[7] must be toggled (Shikra / v4.0) */
+#define LPASS_MACRO_FLAG_BYPASS_FS_CONTROL	BIT(2)
 
 enum lpass_version {
 	LPASS_VER_9_0_0,
@@ -30,6 +32,7 @@ enum lpass_codec_version {
 	LPASS_CODEC_VERSION_2_7,
 	LPASS_CODEC_VERSION_2_8,
 	LPASS_CODEC_VERSION_2_9,
+	LPASS_CODEC_VERSION_4_0,
 };
 
 struct lpass_macro {
@@ -68,6 +71,8 @@ static inline const char *lpass_macro_get_codec_version_string(int version)
 		return "v2.7";
 	case LPASS_CODEC_VERSION_2_8:
 		return "v2.8";
+	case LPASS_CODEC_VERSION_4_0:
+		return "v4.0";
 	default:
 		break;
 	}

sound/soc/codecs/lpass-rx-macro.c

@@ -646,6 +646,7 @@ struct rx_macro {
 	int clsh_users;
 	int rx_mclk_cnt;
 	enum lpass_codec_version codec_version;
+	bool bypass_fs_control;
 	int rxn_reg_stride;
 	int rxn_reg_stride2;
 	bool is_ear_mode_on;
@@ -1612,6 +1613,7 @@ static bool rx_is_rw_register(struct device *dev, unsigned int reg)
 	case LPASS_CODEC_VERSION_2_6:
 	case LPASS_CODEC_VERSION_2_7:
 	case LPASS_CODEC_VERSION_2_8:
+	case LPASS_CODEC_VERSION_4_0:
 		return rx_2_5_is_rw_register(dev, reg);
 	default:
 		break;
@@ -2043,6 +2045,11 @@ static void rx_macro_mclk_enable(struct rx_macro *rx, bool mclk_enable)
 					   CDC_RX_CLK_MCLK2_ENABLE);
 			regmap_update_bits(regmap, CDC_RX_CLK_RST_CTRL_FS_CNT_CONTROL,
 					   CDC_RX_FS_MCLK_CNT_CLR_MASK, 0x00);
+
+			if (rx->bypass_fs_control)
+				regmap_update_bits(regmap,
+						   CDC_RX_CLK_RST_CTRL_FS_CNT_CONTROL,
+						   0x80, 0x80);
 			regmap_update_bits(regmap, CDC_RX_CLK_RST_CTRL_FS_CNT_CONTROL,
 					   CDC_RX_FS_MCLK_CNT_EN_MASK,
 					   CDC_RX_FS_MCLK_CNT_ENABLE);
@@ -3648,6 +3655,7 @@ static int rx_macro_component_probe(struct snd_soc_component *component)
 	case LPASS_CODEC_VERSION_2_6:
 	case LPASS_CODEC_VERSION_2_7:
 	case LPASS_CODEC_VERSION_2_8:
+	case LPASS_CODEC_VERSION_4_0:
 		controls = rx_macro_2_5_snd_controls;
 		num_controls = ARRAY_SIZE(rx_macro_2_5_snd_controls);
 		widgets = rx_macro_2_5_dapm_widgets;
@@ -3809,6 +3817,7 @@ static int rx_macro_probe(struct platform_device *pdev)
 		return PTR_ERR(base);
 
 	rx->codec_version = lpass_macro_get_codec_version();
+	rx->bypass_fs_control = !!(flags & LPASS_MACRO_FLAG_BYPASS_FS_CONTROL);
 	struct reg_default *reg_defaults __free(kfree) = NULL;
 
 	switch (rx->codec_version) {
@@ -3831,6 +3840,7 @@ static int rx_macro_probe(struct platform_device *pdev)
 	case LPASS_CODEC_VERSION_2_6:
 	case LPASS_CODEC_VERSION_2_7:
 	case LPASS_CODEC_VERSION_2_8:
+	case LPASS_CODEC_VERSION_4_0:
 		rx->rxn_reg_stride = 0xc0;
 		rx->rxn_reg_stride2 = 0x0;
 		def_count = ARRAY_SIZE(rx_defaults) + ARRAY_SIZE(rx_2_5_defaults);
@@ -3961,6 +3971,10 @@ static const struct of_device_id rx_macro_dt_match[] = {
 	}, {
 		.compatible = "qcom,sc8280xp-lpass-rx-macro",
 		.data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK,
+	}, {
+		.compatible = "qcom,shikra-lpass-rx-macro",
+		.data = (void *)(LPASS_MACRO_FLAG_HAS_NPL_CLOCK |
+				LPASS_MACRO_FLAG_BYPASS_FS_CONTROL),
 	},
 	{ }
 };