Skip to content

Commit 1f42f01

Browse files
author
Hangtian Zhu
committed
FROMLIST: arm64: dts: qcom: qcs6490-rb3gen2-industrial-mezzanine: Disable WCN6750 and WPSS
On the RB3 Gen2 industrial mezzanine platform, since PCIe0 now routes to TC9563 instead of WCN6750, disable the WCN6750 and WPSS device tree nodes to reflect the actual hardware configuration and avoid probing issues. Signed-off-by: Hangtian Zhu <hangtian@oss.qualcomm.com> Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260317-industrial-mezzanine-pcie-v5-1-1358978517fe@oss.qualcomm.com/
1 parent c60e1a1 commit 1f42f01

File tree

1 file changed

+8
-0
lines changed

1 file changed

+8
-0
lines changed

arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,10 @@
3232
};
3333
};
3434

35+
&remoteproc_wpss {
36+
status = "disabled";
37+
};
38+
3539
&spi11 {
3640
#address-cells = <1>;
3741
#size-cells = <0>;
@@ -280,3 +284,7 @@
280284
};
281285

282286
};
287+
288+
&wifi {
289+
status = "disabled";
290+
};

0 commit comments

Comments
 (0)