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| 1 | +// SPDX-License-Identifier: BSD-3-Clause |
| 2 | +/* |
| 3 | + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. |
| 4 | + * |
| 5 | + * Glymur staging overlay - add staging-specific device tree modifications here. |
| 6 | + */ |
| 7 | + |
| 8 | +/dts-v1/; |
| 9 | +/plugin/; |
| 10 | + |
| 11 | +&soc { |
| 12 | + ctcu@10001000 { |
| 13 | + compatible = "qcom,glymur-ctcu", "qcom,sa8775p-ctcu"; |
| 14 | + reg = <0x0 0x10001000 0x0 0x1000>; |
| 15 | + |
| 16 | + clocks = <&aoss_qmp>; |
| 17 | + clock-names = "apb"; |
| 18 | + |
| 19 | + in-ports { |
| 20 | + #address-cells = <1>; |
| 21 | + #size-cells = <0>; |
| 22 | + |
| 23 | + port@0 { |
| 24 | + reg = <0>; |
| 25 | + |
| 26 | + ctcu_in0: endpoint { |
| 27 | + remote-endpoint = <&etr0_out>; |
| 28 | + }; |
| 29 | + }; |
| 30 | + |
| 31 | + port@1 { |
| 32 | + reg = <1>; |
| 33 | + |
| 34 | + ctcu_in1: endpoint { |
| 35 | + remote-endpoint = <&etr1_out>; |
| 36 | + }; |
| 37 | + }; |
| 38 | + }; |
| 39 | + }; |
| 40 | + |
| 41 | + replicator@10046000 { |
| 42 | + compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; |
| 43 | + reg = <0x0 0x10046000 0x0 0x1000>; |
| 44 | + |
| 45 | + clocks = <&aoss_qmp>; |
| 46 | + clock-names = "apb_pclk"; |
| 47 | + |
| 48 | + in-ports { |
| 49 | + port { |
| 50 | + qdss_rep_in: endpoint { |
| 51 | + remote-endpoint = <&swao_rep_out0>; |
| 52 | + }; |
| 53 | + }; |
| 54 | + }; |
| 55 | + |
| 56 | + out-ports { |
| 57 | + port { |
| 58 | + qdss_rep_out0: endpoint { |
| 59 | + remote-endpoint = <&etr_rep_in>; |
| 60 | + }; |
| 61 | + }; |
| 62 | + }; |
| 63 | + }; |
| 64 | + |
| 65 | + tmc@10048000 { |
| 66 | + compatible = "arm,coresight-tmc", "arm,primecell"; |
| 67 | + reg = <0x0 0x10048000 0x0 0x1000>; |
| 68 | + |
| 69 | + clocks = <&aoss_qmp>; |
| 70 | + clock-names = "apb_pclk"; |
| 71 | + |
| 72 | + iommus = <&apps_smmu 0x00e0 0x0000>; |
| 73 | + |
| 74 | + arm,scatter-gather; |
| 75 | + |
| 76 | + in-ports { |
| 77 | + port { |
| 78 | + etr0_in: endpoint { |
| 79 | + remote-endpoint = <&etr_rep_out0>; |
| 80 | + }; |
| 81 | + }; |
| 82 | + }; |
| 83 | + |
| 84 | + out-ports { |
| 85 | + port { |
| 86 | + etr0_out: endpoint { |
| 87 | + remote-endpoint = <&ctcu_in0>; |
| 88 | + }; |
| 89 | + }; |
| 90 | + }; |
| 91 | + }; |
| 92 | + |
| 93 | + replicator@1004e000 { |
| 94 | + compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; |
| 95 | + reg = <0x0 0x1004e000 0x0 0x1000>; |
| 96 | + |
| 97 | + clocks = <&aoss_qmp>; |
| 98 | + clock-names = "apb_pclk"; |
| 99 | + |
| 100 | + in-ports { |
| 101 | + port { |
| 102 | + etr_rep_in: endpoint { |
| 103 | + remote-endpoint = <&qdss_rep_out0>; |
| 104 | + }; |
| 105 | + }; |
| 106 | + }; |
| 107 | + |
| 108 | + out-ports { |
| 109 | + #address-cells = <1>; |
| 110 | + #size-cells = <0>; |
| 111 | + |
| 112 | + port@0 { |
| 113 | + reg = <0>; |
| 114 | + |
| 115 | + etr_rep_out0: endpoint { |
| 116 | + remote-endpoint = <&etr0_in>; |
| 117 | + }; |
| 118 | + }; |
| 119 | + |
| 120 | + port@1 { |
| 121 | + reg = <1>; |
| 122 | + |
| 123 | + etr_rep_out1: endpoint { |
| 124 | + remote-endpoint = <&etr1_in>; |
| 125 | + }; |
| 126 | + }; |
| 127 | + }; |
| 128 | + }; |
| 129 | + |
| 130 | + tmc@1004f000 { |
| 131 | + compatible = "arm,coresight-tmc", "arm,primecell"; |
| 132 | + reg = <0x0 0x1004f000 0x0 0x1000>; |
| 133 | + |
| 134 | + clocks = <&aoss_qmp>; |
| 135 | + clock-names = "apb_pclk"; |
| 136 | + |
| 137 | + iommus = <&apps_smmu 0x0100 0x0000>; |
| 138 | + |
| 139 | + arm,scatter-gather; |
| 140 | + |
| 141 | + in-ports { |
| 142 | + port { |
| 143 | + etr1_in: endpoint { |
| 144 | + remote-endpoint = <&etr_rep_out1>; |
| 145 | + }; |
| 146 | + }; |
| 147 | + }; |
| 148 | + |
| 149 | + out-ports { |
| 150 | + port { |
| 151 | + etr1_out: endpoint { |
| 152 | + remote-endpoint = <&ctcu_in1>; |
| 153 | + }; |
| 154 | + }; |
| 155 | + }; |
| 156 | + }; |
| 157 | + |
| 158 | + tgu@11c02000 { |
| 159 | + compatible = "qcom,tgu", "arm,primecell"; |
| 160 | + reg = <0x0 0x11c02000 0x0 0x1000>; |
| 161 | + |
| 162 | + clocks = <&aoss_qmp>; |
| 163 | + clock-names = "apb_pclk"; |
| 164 | + }; |
| 165 | + |
| 166 | + replicator@11c06000 { |
| 167 | + out-ports { |
| 168 | + port@0 { |
| 169 | + reg = <0>; |
| 170 | + |
| 171 | + swao_rep_out0: endpoint { |
| 172 | + remote-endpoint = <&qdss_rep_in>; |
| 173 | + }; |
| 174 | + }; |
| 175 | + }; |
| 176 | + }; |
| 177 | + |
| 178 | + tgu@11c0e000 { |
| 179 | + compatible = "qcom,tgu", "arm,primecell"; |
| 180 | + reg = <0x0 0x11c0e000 0x0 0x1000>; |
| 181 | + |
| 182 | + clocks = <&aoss_qmp>; |
| 183 | + clock-names = "apb_pclk"; |
| 184 | + }; |
| 185 | + |
| 186 | + tgu@11c0f000 { |
| 187 | + compatible = "qcom,tgu", "arm,primecell"; |
| 188 | + reg = <0x0 0x11c0f000 0x0 0x1000>; |
| 189 | + |
| 190 | + clocks = <&aoss_qmp>; |
| 191 | + clock-names = "apb_pclk"; |
| 192 | + }; |
| 193 | + |
| 194 | + tgu@11c10000 { |
| 195 | + compatible = "qcom,tgu", "arm,primecell"; |
| 196 | + reg = <0x0 0x11c10000 0x0 0x1000>; |
| 197 | + |
| 198 | + clocks = <&aoss_qmp>; |
| 199 | + clock-names = "apb_pclk"; |
| 200 | + }; |
| 201 | +}; |
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