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Enable IPCB for Hamoa and Glymur (#602)
Enable IPCB for Hamoa and Glymur
2 parents df44dd2 + 3be3604 commit 902605e

3 files changed

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arch/arm64/boot/dts/qcom/Makefile

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@@ -532,3 +532,7 @@ dtb-$(CONFIG_ARCH_QCOM) += talos-evk-camx.dtb
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dtb-$(CONFIG_ARCH_QCOM) += talos-staging.dtbo
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dtb-$(CONFIG_ARCH_QCOM) += kodiak-staging.dtbo
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dtb-$(CONFIG_ARCH_QCOM) += hamoa-staging.dtbo
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dtb-$(CONFIG_ARCH_QCOM) += glymur-staging.dtbo
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
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*
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* Glymur staging overlay - add staging-specific device tree modifications here.
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*/
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/dts-v1/;
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/plugin/;
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&soc {
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ctcu@10001000 {
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compatible = "qcom,glymur-ctcu", "qcom,sa8775p-ctcu";
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reg = <0x0 0x10001000 0x0 0x1000>;
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clocks = <&aoss_qmp>;
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clock-names = "apb";
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in-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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ctcu_in0: endpoint {
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remote-endpoint = <&etr0_out>;
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};
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};
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port@1 {
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reg = <1>;
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ctcu_in1: endpoint {
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remote-endpoint = <&etr1_out>;
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};
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};
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};
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};
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replicator@10046000 {
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compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
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reg = <0x0 0x10046000 0x0 0x1000>;
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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in-ports {
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port {
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qdss_rep_in: endpoint {
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remote-endpoint = <&swao_rep_out0>;
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};
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};
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};
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out-ports {
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port {
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qdss_rep_out0: endpoint {
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remote-endpoint = <&etr_rep_in>;
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};
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};
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};
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};
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tmc@10048000 {
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compatible = "arm,coresight-tmc", "arm,primecell";
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reg = <0x0 0x10048000 0x0 0x1000>;
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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iommus = <&apps_smmu 0x00e0 0x0000>;
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arm,scatter-gather;
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in-ports {
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port {
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etr0_in: endpoint {
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remote-endpoint = <&etr_rep_out0>;
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};
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};
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};
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out-ports {
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port {
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etr0_out: endpoint {
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remote-endpoint = <&ctcu_in0>;
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};
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};
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};
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};
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replicator@1004e000 {
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compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
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reg = <0x0 0x1004e000 0x0 0x1000>;
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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in-ports {
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port {
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etr_rep_in: endpoint {
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remote-endpoint = <&qdss_rep_out0>;
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};
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};
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};
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out-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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etr_rep_out0: endpoint {
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remote-endpoint = <&etr0_in>;
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};
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};
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port@1 {
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reg = <1>;
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etr_rep_out1: endpoint {
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remote-endpoint = <&etr1_in>;
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};
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};
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};
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};
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tmc@1004f000 {
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compatible = "arm,coresight-tmc", "arm,primecell";
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reg = <0x0 0x1004f000 0x0 0x1000>;
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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iommus = <&apps_smmu 0x0100 0x0000>;
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arm,scatter-gather;
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in-ports {
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port {
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etr1_in: endpoint {
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remote-endpoint = <&etr_rep_out1>;
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};
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};
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};
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out-ports {
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port {
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etr1_out: endpoint {
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remote-endpoint = <&ctcu_in1>;
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};
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};
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};
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};
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tgu@11c02000 {
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compatible = "qcom,tgu", "arm,primecell";
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reg = <0x0 0x11c02000 0x0 0x1000>;
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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replicator@11c06000 {
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out-ports {
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port@0 {
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reg = <0>;
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swao_rep_out0: endpoint {
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remote-endpoint = <&qdss_rep_in>;
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};
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};
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};
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};
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tgu@11c0e000 {
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compatible = "qcom,tgu", "arm,primecell";
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reg = <0x0 0x11c0e000 0x0 0x1000>;
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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tgu@11c0f000 {
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compatible = "qcom,tgu", "arm,primecell";
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reg = <0x0 0x11c0f000 0x0 0x1000>;
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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tgu@11c10000 {
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compatible = "qcom,tgu", "arm,primecell";
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reg = <0x0 0x11c10000 0x0 0x1000>;
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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};
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
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*
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* Hamoa staging overlay - add staging-specific device tree modifications here.
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*/
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/dts-v1/;
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/plugin/;
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&soc {
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tgu@10b0e000 {
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compatible = "qcom,tgu", "arm,primecell";
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reg = <0x0 0x10b0e000 0x0 0x1000>;
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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tgu@10b0f000 {
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compatible = "qcom,tgu", "arm,primecell";
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reg = <0x0 0x10b0f000 0x0 0x1000>;
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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tgu@10b10000 {
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compatible = "qcom,tgu", "arm,primecell";
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reg = <0x0 0x10b10000 0x0 0x1000>;
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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};

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