FROMLIST: arm64: dts: qcom: msm8996: Move PCIe phy and

The PCIe phy reference and the perst/wake GPIO properties are
per root port and belong in the root port node (pcie@0), not in the
RC controller node. Move phys and phy-names from the controller to
pcie0_port0, pcie1_port0, and pcie2_port0, adding labels to these
nodes to allow board-level overrides. Move perst-gpios/wake-gpios
from the controller overrides to the respective port nodes in the
board files, renaming perst-gpios to reset-gpios to match the binding
used in the root port context.

Signed-off-by: Krishna Chaitanya Chundru <krishna.chaitanya.chundru@oss.qualcomm.com>

Link: https://lore.kernel.org/all/20260611-wake-v2-37-2744251b1181@oss.qualcomm.com/

Author: krishnachaitanya-linux

arch/arm64/boot/dts/qcom/msm8996-oneplus-common.dtsi

@@ -210,7 +210,7 @@
 };
 
 &pcie0 {
-	perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
+&pcie0_port0 {
 	vddpe-3v3-supply = <&wlan_en>;
 	vdda-supply = <&vreg_l28a_0p925>;
 	status = "okay";

arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone.dtsi

@@ -191,8 +191,8 @@
 };
 
 &pcie0 {
-	perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
-	wake-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
+	reset-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
+&pcie0_port0 {
 	vddpe-3v3-supply = <&wlan_en>;
 	vdda-supply = <&pm8994_l28>;
 	status = "okay";

arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi

@@ -279,7 +279,7 @@
 	vddpe-3v3-supply = <&wlan_en>;
 	vdda-supply = <&vreg_l28a_0p925>;
 
-	perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
+&pcie0_port0 {
 	wake-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
 };
 

arch/arm64/boot/dts/qcom/msm8996.dtsi

@@ -1901,7 +1901,7 @@
 				reg-names = "parf", "dbi", "elbi","config";
 
 				phys = <&pciephy_0>;
-				phy-names = "pciephy";
+					phys = <&pciephy_0>;
 
 				#address-cells = <3>;
 				#size-cells = <2>;
@@ -1951,7 +1951,7 @@
 						"bus_master",
 						"bus_slave";
 
-				pcie@0 {
+				pcie0_port0: pcie@0 {
 					device_type = "pci";
 					reg = <0x0 0x0 0x0 0x0 0x0>;
 					bus-range = <0x01 0xff>;
@@ -1978,7 +1978,7 @@
 				reg-names = "parf", "dbi", "elbi","config";
 
 				phys = <&pciephy_1>;
-				phy-names = "pciephy";
+					phys = <&pciephy_1>;
 
 				#address-cells = <3>;
 				#size-cells = <2>;
@@ -2028,7 +2028,7 @@
 						"bus_master",
 						"bus_slave";
 
-				pcie@0 {
+				pcie1_port0: pcie@0 {
 					device_type = "pci";
 					reg = <0x0 0x0 0x0 0x0 0x0>;
 					bus-range = <0x01 0xff>;
@@ -2053,7 +2053,7 @@
 				reg-names = "parf", "dbi", "elbi","config";
 
 				phys = <&pciephy_2>;
-				phy-names = "pciephy";
+					phys = <&pciephy_2>;
 
 				#address-cells = <3>;
 				#size-cells = <2>;
@@ -2102,7 +2102,7 @@
 						"bus_master",
 						"bus_slave";
 
-				pcie@0 {
+				pcie2_port0: pcie@0 {
 					device_type = "pci";
 					reg = <0x0 0x0 0x0 0x0 0x0>;
 					bus-range = <0x01 0xff>;