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Vishnu Saini
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FROMLIST: arm64: dts: qcom: lemans-evk-ifp-mezzanine: Enable mdss1 display Port
Enable DP controllers, DPTX0 and DPTX1 alongside their corresponding PHYs of mdss1 which corresponds to eDP2 and eDP3. CRs-Fixed: 4346713 Link: https://lore.kernel.org/all/20260402095003.3758176-4-quic_mkuntuma@quicinc.com/ Signed-off-by: Mani Chandana Ballary Kuntumalla <quic_mkuntuma@quicinc.com> Signed-off-by: Vishnu Saini <vishnu.saini@oss.qualcomm.com>
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arch/arm64/boot/dts/qcom/lemans-evk-ifp-mezzanine.dtso

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@@ -11,6 +11,30 @@
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&{/} {
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model = "Qualcomm Technologies, Inc. Lemans-evk IFP Mezzanine";
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dp2-connector {
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compatible = "dp-connector";
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label = "eDP2";
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type = "full-size";
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port {
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dp2_connector_in: endpoint {
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remote-endpoint = <&mdss1_dp0_out>;
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};
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};
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};
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dp3-connector {
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compatible = "dp-connector";
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label = "eDP3";
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type = "full-size";
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port {
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dp3_connector_in: endpoint {
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remote-endpoint = <&mdss1_dp1_out>;
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};
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};
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};
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vreg_0p9: regulator-0v9 {
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compatible = "regulator-fixed";
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regulator-name = "VREG_0P9";
@@ -141,6 +165,44 @@
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};
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};
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&mdss1 {
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status = "okay";
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};
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&mdss1_dp0 {
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pinctrl-0 = <&dp2_hot_plug_det>;
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pinctrl-names = "default";
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status = "okay";
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};
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&mdss1_dp1 {
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pinctrl-0 = <&dp3_hot_plug_det>;
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pinctrl-names = "default";
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status = "okay";
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};
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&mdss1_dp0_out {
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data-lanes = <0 1 2 3>;
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link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
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remote-endpoint = <&dp2_connector_in>;
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};
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&mdss1_dp1_out {
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data-lanes = <0 1 2 3>;
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link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
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remote-endpoint = <&dp3_connector_in>;
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};
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&mdss1_dp0_phy {
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status = "okay";
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};
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&mdss1_dp1_phy {
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status = "okay";
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};
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&pcie0 {
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iommu-map = <0x0 &pcie_smmu 0x0 0x1>,
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<0x100 &pcie_smmu 0x1 0x1>,
@@ -235,6 +297,18 @@
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};
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&tlmm {
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dp2_hot_plug_det: dp2-hot-plug-det-state {
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pins = "gpio104";
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function = "edp2_hot";
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bias-disable;
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};
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dp3_hot_plug_det: dp3-hot-plug-det-state {
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pins = "gpio103";
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function = "edp3_hot";
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bias-disable;
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};
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ethernet1_default: ethernet1-default-state {
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ethernet1-mdc-pins {
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pins = "gpio20";

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