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FROMLIST: arm64: dts: qcom: Fix PCIe wake GPIO polarity #799

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a1ffbe7
FROMLIST: ARM: dts: qcom: sdx55: Fix PCIe wake GPIO
krishnachaitanya-linux Jun 11, 2026
ed138d7
FROMLIST: arm64: dts: qcom: msm8996: Fix PCIe wake GPIO
krishnachaitanya-linux Jun 11, 2026
607b73e
FROMLIST: arm64: dts: qcom: sdm845: Fix PCIe wake GPIO
krishnachaitanya-linux Jun 11, 2026
3aef230
FROMLIST: arm64: dts: qcom: sc8180x: Fix PCIe wake GPIO
krishnachaitanya-linux Jun 11, 2026
e56b67e
FROMLIST: arm64: dts: qcom: sm8150: Fix PCIe wake GPIO
krishnachaitanya-linux Jun 11, 2026
7d0604d
FROMLIST: arm64: dts: qcom: sm8250: Fix PCIe wake GPIO
krishnachaitanya-linux Jun 11, 2026
fb8f871
FROMLIST: arm64: dts: qcom: sm8350: Fix PCIe wake GPIO
krishnachaitanya-linux Jun 11, 2026
6620a41
FROMLIST: arm64: dts: qcom: sm8450: Fix PCIe wake GPIO
krishnachaitanya-linux Jun 11, 2026
69c2a2b
FROMLIST: arm64: dts: qcom: sm8550: Fix PCIe wake GPIO
krishnachaitanya-linux Jun 11, 2026
8d72142
FROMLIST: arm64: dts: qcom: sm8650: Fix PCIe wake GPIO
krishnachaitanya-linux Jun 11, 2026
72ad863
FROMLIST: arm64: dts: qcom: sm8750: Fix PCIe wake GPIO
krishnachaitanya-linux Jun 11, 2026
e08f9b2
FROMLIST: arm64: dts: qcom: sar2130p: Fix PCIe wake GPIO
krishnachaitanya-linux Jun 11, 2026
ef763ed
FROMLIST: arm64: dts: qcom: monaco: Fix PCIe wake GPIO
krishnachaitanya-linux Jun 11, 2026
02b12ed
FROMLIST: arm64: dts: qcom: lemans: Fix PCIe wake GPIO
krishnachaitanya-linux Jun 11, 2026
0a91a8a
FROMLIST: arm64: dts: qcom: sa8540p-ride: Fix PCIe wake
krishnachaitanya-linux Jun 11, 2026
a8b1716
FROMLIST: arm64: dts: qcom: kodiak: Fix PCIe wake GPIO
krishnachaitanya-linux Jun 11, 2026
6e26e16
FROMLIST: arm64: dts: qcom: talos: Fix PCIe wake GPIO
krishnachaitanya-linux Jun 11, 2026
e41f711
FROMLIST: arm64: dts: qcom: lemans: Move PCIe phy and GPIOs
krishnachaitanya-linux Jun 11, 2026
8408bd6
FROMLIST: arm64: dts: qcom: msm8998: Move PCIe phy and
krishnachaitanya-linux Jun 11, 2026
ab465e6
FROMLIST: arm64: dts: qcom: qcs404: Move PCIe phy and GPIOs
krishnachaitanya-linux Jun 11, 2026
8b1cc1d
FROMLIST: arm64: dts: qcom: qcs8550: Move PCIe GPIOs to
krishnachaitanya-linux Jun 11, 2026
69887a1
FROMLIST: arm64: dts: qcom: sa8295p: Move PCIe GPIOs to
krishnachaitanya-linux Jun 11, 2026
dd289d7
FROMLIST: arm64: dts: qcom: sa8540p: Move PCIe GPIOs to
krishnachaitanya-linux Jun 11, 2026
aa86b79
FROMLIST: arm64: dts: qcom: sar2130p: Move PCIe phy and
krishnachaitanya-linux Jun 11, 2026
5588b89
FROMLIST: arm64: dts: qcom: sc8180x: Move PCIe phy and
krishnachaitanya-linux Jun 11, 2026
f4dd93c
FROMLIST: arm64: dts: qcom: sc8280xp: Move PCIe phy and
krishnachaitanya-linux Jun 11, 2026
9df5f49
FROMLIST: arm64: dts: qcom: sdm845: Move PCIe phy and GPIOs
krishnachaitanya-linux Jun 11, 2026
017a109
FROMLIST: arm64: dts: qcom: sm8150: Move PCIe phy and GPIOs
krishnachaitanya-linux Jun 11, 2026
c116be7
FROMLIST: arm64: dts: qcom: sm8250: Move PCIe phy and GPIOs
krishnachaitanya-linux Jun 11, 2026
9d8f244
FROMLIST: arm64: dts: qcom: sm8350: Move PCIe phy and GPIOs
krishnachaitanya-linux Jun 11, 2026
273784f
FROMLIST: arm64: dts: qcom: sm8450: Move PCIe phy and GPIOs
krishnachaitanya-linux Jun 11, 2026
b9bfe32
FROMLIST: arm64: dts: qcom: sm8550: Move PCIe phy and GPIOs
krishnachaitanya-linux Jun 11, 2026
a47949e
FROMLIST: arm64: dts: qcom: talos: Move PCIe phy and GPIOs
krishnachaitanya-linux Jun 11, 2026
39b1161
FROMLIST: arm64: dts: qcom: sm8650: Move PCIe phy and GPIOs
krishnachaitanya-linux Jun 11, 2026
32d1449
FROMLIST: arm64: dts: qcom: kodiak: Move PCIe phy and GPIOs
krishnachaitanya-linux Jun 11, 2026
1980ba6
FROMLIST: arm64: dts: qcom: msm8996: Move PCIe phy and
krishnachaitanya-linux Jun 11, 2026
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2 changes: 1 addition & 1 deletion arch/arm/boot/dts/qcom/qcom-sdx55-t55.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -251,7 +251,7 @@

&pcie_rc {
perst-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 53 GPIO_ACTIVE_HIGH>;
wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;

pinctrl-0 = <&pcie_default>;
pinctrl-names = "default";
Expand Down
10 changes: 5 additions & 5 deletions arch/arm64/boot/dts/qcom/lemans-evk.dts
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// SPDX-License-Identifier: BSD-3-Clause
&pcieport1 {&pcieport0 {// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024-2025, Qualcomm Innovation Center, Inc. All rights reserved.
*/
Expand Down Expand Up @@ -833,8 +833,8 @@
};

&pcie0 {
perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;

pinctrl-0 = <&pcie0_default_state>;
pinctrl-names = "default";
Expand All @@ -850,8 +850,8 @@
};

&pcie1 {
perst-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
reset-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;

pinctrl-0 = <&pcie1_default_state>;
pinctrl-names = "default";
Expand Down
10 changes: 5 additions & 5 deletions arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// SPDX-License-Identifier: BSD-3-Clause
};// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2023, Linaro Limited
*/
Expand Down Expand Up @@ -968,8 +968,8 @@
};

&pcie0 {
perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
&pcieport1 {
wake-gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;

pinctrl-names = "default";
pinctrl-0 = <&pcie0_default_state>;
Expand All @@ -978,8 +978,8 @@
};

&pcie1 {
perst-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
&pcieport0 {

pinctrl-names = "default";
pinctrl-0 = <&pcie1_default_state>;
Expand Down
8 changes: 4 additions & 4 deletions arch/arm64/boot/dts/qcom/lemans.dtsi
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// SPDX-License-Identifier: BSD-3-Clause
phys = <&pcie1_phy>; phys = <&pcie0_phy>;// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2023, Linaro Limited
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
Expand Down Expand Up @@ -8990,7 +8990,7 @@
power-domains = <&gcc PCIE_0_GDSC>;

phys = <&pcie0_phy>;
phy-names = "pciephy";


eq-presets-8gts = /bits/ 16 <0x5555 0x5555>;
eq-presets-16gts = /bits/ 8 <0x55 0x55>;
Expand Down Expand Up @@ -9048,7 +9048,7 @@
reset-names = "core";
power-domains = <&gcc PCIE_0_GDSC>;
phys = <&pcie0_phy>;
phy-names = "pciephy";

num-lanes = <2>;
linux,pci-domain = <0>;

Expand Down Expand Up @@ -9170,7 +9170,7 @@

status = "disabled";

pcie@0 {
pcieport1: pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/qcom/monaco-evk-common.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -734,12 +734,12 @@

&pcieport0 {
reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
wake-gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
};

&pcieport1 {
reset-gpios = <&tlmm 23 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
wake-gpios = <&tlmm 21 GPIO_ACTIVE_LOW>;
};

&pmm8620au_0_gpios {
Expand Down
2 changes: 1 addition & 1 deletion arch/arm64/boot/dts/qcom/msm8996-oneplus-common.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -210,7 +210,7 @@
};

&pcie0 {
perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
&pcie0_port0 {
vddpe-3v3-supply = <&wlan_en>;
vdda-supply = <&vreg_l28a_0p925>;
status = "okay";
Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -191,8 +191,8 @@
};

&pcie0 {
perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
reset-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
&pcie0_port0 {
vddpe-3v3-supply = <&wlan_en>;
vdda-supply = <&pm8994_l28>;
status = "okay";
Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -279,8 +279,8 @@
vddpe-3v3-supply = <&wlan_en>;
vdda-supply = <&vreg_l28a_0p925>;

perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
&pcie0_port0 {
wake-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
};

&pcie_phy {
Expand Down
12 changes: 6 additions & 6 deletions arch/arm64/boot/dts/qcom/msm8996.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -1901,7 +1901,7 @@
reg-names = "parf", "dbi", "elbi","config";

phys = <&pciephy_0>;
phy-names = "pciephy";
phys = <&pciephy_0>;

#address-cells = <3>;
#size-cells = <2>;
Expand Down Expand Up @@ -1951,7 +1951,7 @@
"bus_master",
"bus_slave";

pcie@0 {
pcie0_port0: pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
Expand All @@ -1978,7 +1978,7 @@
reg-names = "parf", "dbi", "elbi","config";

phys = <&pciephy_1>;
phy-names = "pciephy";
phys = <&pciephy_1>;

#address-cells = <3>;
#size-cells = <2>;
Expand Down Expand Up @@ -2028,7 +2028,7 @@
"bus_master",
"bus_slave";

pcie@0 {
pcie1_port0: pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
Expand All @@ -2053,7 +2053,7 @@
reg-names = "parf", "dbi", "elbi","config";

phys = <&pciephy_2>;
phy-names = "pciephy";
phys = <&pciephy_2>;

#address-cells = <3>;
#size-cells = <2>;
Expand Down Expand Up @@ -2102,7 +2102,7 @@
"bus_master",
"bus_slave";

pcie@0 {
pcie2_port0: pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
Expand Down
8 changes: 4 additions & 4 deletions arch/arm64/boot/dts/qcom/msm8998.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -928,8 +928,8 @@
#address-cells = <3>;
#size-cells = <2>;
num-lanes = <1>;
phys = <&pcie_phy>;
phy-names = "pciephy";
reset-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
phys = <&pcie_phy>;
status = "disabled";

ranges = <0x01000000 0x0 0x00000000 0x1b200000 0x0 0x100000>,
Expand Down Expand Up @@ -969,9 +969,9 @@

power-domains = <&gcc PCIE_0_GDSC>;
iommu-map = <0x100 &anoc1_smmu 0x1480 1>;
perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;

pcie@0 {

pcie0_port0: pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
Expand Down
8 changes: 4 additions & 4 deletions arch/arm64/boot/dts/qcom/qcm6490-particle-tachyon.dts
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// SPDX-License-Identifier: BSD-3-Clause
&pcie1_port0 {&pcie0_port {// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
* Copyright (c) 2023, Luca Weiss <luca.weiss@fairphone.com>
Expand Down Expand Up @@ -549,8 +549,8 @@
};

&pcie0 {
perst-gpios = <&tlmm 87 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 89 GPIO_ACTIVE_HIGH>;
reset-gpios = <&tlmm 87 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>;

pinctrl-0 = <&pcie0_reset_n>, <&pcie0_wake_n>, <&pcie0_clkreq_n>;
pinctrl-names = "default";
Expand All @@ -566,7 +566,7 @@
};

&pcie1 {
perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;

pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>, <&pcie1_clkreq_n>;
pinctrl-names = "default";
Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// SPDX-License-Identifier: GPL-2.0
&pcie0_port0 {// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2018, Linaro Limited
*/
Expand Down Expand Up @@ -101,7 +101,7 @@
&pcie {
status = "okay";

perst-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
reset-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;

pinctrl-names = "default";
pinctrl-0 = <&perst_state>;
Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/qcom/qcs404.dtsi
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Expand Up @@ -1518,11 +1518,11 @@
"ahb";

phys = <&pcie_phy>;
phy-names = "pciephy";
phys = <&pcie_phy>;

status = "disabled";

pcie@0 {
pcie0_port0: pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
Expand Down
6 changes: 3 additions & 3 deletions arch/arm64/boot/dts/qcom/qcs615-ride.dts
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// SPDX-License-Identifier: BSD-3-Clause
&pcie_port0 {// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/
Expand Down Expand Up @@ -523,8 +523,8 @@
};

&pcie {
perst-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
reset-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 100 GPIO_ACTIVE_LOW>;

pinctrl-0 = <&pcie_default_state>;
pinctrl-names = "default";
Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// SPDX-License-Identifier: BSD-3-Clause
reset-gpios = <&tlmm 87 GPIO_ACTIVE_LOW>;// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved.
*/
Expand Down Expand Up @@ -81,7 +81,7 @@
};

&pcie0 {
perst-gpios = <&tlmm 87 GPIO_ACTIVE_LOW>;


pinctrl-0 = <&pcie0_reset_n>, <&pcie0_wake_n>, <&pcie0_clkreq_n>;
pinctrl-names = "default";
Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// SPDX-License-Identifier: BSD-3-Clause
reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
Expand Down Expand Up @@ -976,7 +976,7 @@
};

&pcie1 {
perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;


pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>, <&pcie1_clkreq_n>;
pinctrl-names = "default";
Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/qcom/qcs8300-ride.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -597,7 +597,7 @@

&pcieport0 {
reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
wake-gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
};

&pcie0_phy {
Expand All @@ -617,7 +617,7 @@

&pcieport1 {
reset-gpios = <&tlmm 23 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
wake-gpios = <&tlmm 21 GPIO_ACTIVE_LOW>;
};

&pcie1_phy {
Expand Down
10 changes: 5 additions & 5 deletions arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// SPDX-License-Identifier: BSD-3-Clause
&pcie1_port0 {&pcieport0 {// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/
Expand Down Expand Up @@ -335,8 +335,8 @@
};

&pcie0 {
perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
reset-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 96 GPIO_ACTIVE_LOW>;

pinctrl-0 = <&pcie0_default_state>;
pinctrl-names = "default";
Expand All @@ -348,8 +348,8 @@
};

&pcie1 {
perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
reset-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>;

pinctrl-0 = <&pcie1_default_state>;
pinctrl-names = "default";
Expand Down
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