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WORKAROUND: arm64: dts: qcom: Add PCIe IOMMU mappings in Monaco and Lemans staging dtso #808

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Hariharan Sreedhar (hariharan-sree) wants to merge 2 commits into
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WORKAROUND: arm64: dts: qcom: Add PCIe IOMMU mappings in Monaco and Lemans staging dtso #808

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WORKAROUND: arm64: dts: qcom: monaco: add PCIe IOMMU mappings in stag…
hariharan-sree Jul 6, 2026
4de28d7
WORKAROUND: arm64: dts: qcom: lemans: add PCIe IOMMU mappings in stag…
hariharan-sree Jul 6, 2026
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46 changes: 46 additions & 0 deletions arch/arm64/boot/dts/qcom/lemans-staging.dtso
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Original file line number Diff line number Diff line change
Expand Up @@ -64,3 +64,49 @@
bias-disable;
};
};

&pcie0 {
iommu-map = <0x0 &pcie_smmu 0x00 0x1>,
<0x100 &pcie_smmu 0x01 0x1>,
<0x101 &pcie_smmu 0x02 0x1>,
<0x208 &pcie_smmu 0x03 0x1>,
<0x210 &pcie_smmu 0x04 0x1>,
<0x218 &pcie_smmu 0x05 0x1>,
<0x280 &pcie_smmu 0x06 0x1>,
<0x282 &pcie_smmu 0x07 0x1>,
<0x284 &pcie_smmu 0x08 0x1>,
<0x286 &pcie_smmu 0x09 0x1>,
<0x288 &pcie_smmu 0x0a 0x1>,
<0x28a &pcie_smmu 0x0b 0x1>,
<0x28c &pcie_smmu 0x0c 0x1>,
<0x28e &pcie_smmu 0x0d 0x1>,
<0x290 &pcie_smmu 0x0e 0x1>,
<0x292 &pcie_smmu 0x0f 0x1>,
<0x300 &pcie_smmu 0x10 0x1>,
<0x400 &pcie_smmu 0x11 0x1>,
<0x500 &pcie_smmu 0x12 0x1>,
<0x501 &pcie_smmu 0x13 0x1>;
};

&pcie1 {
iommu-map = <0x0 &pcie_smmu 0x80 0x1>,
<0x100 &pcie_smmu 0x81 0x1>,
<0x101 &pcie_smmu 0x82 0x1>,
<0x208 &pcie_smmu 0x83 0x1>,
<0x210 &pcie_smmu 0x84 0x1>,
<0x218 &pcie_smmu 0x85 0x1>,
<0x280 &pcie_smmu 0x86 0x1>,
<0x282 &pcie_smmu 0x87 0x1>,
<0x284 &pcie_smmu 0x88 0x1>,
<0x286 &pcie_smmu 0x89 0x1>,
<0x288 &pcie_smmu 0x8a 0x1>,
<0x28a &pcie_smmu 0x8b 0x1>,
<0x28c &pcie_smmu 0x8c 0x1>,
<0x28e &pcie_smmu 0x8d 0x1>,
<0x290 &pcie_smmu 0x8e 0x1>,
<0x292 &pcie_smmu 0x8f 0x1>,
<0x300 &pcie_smmu 0x90 0x1>,
<0x400 &pcie_smmu 0x91 0x1>,
<0x500 &pcie_smmu 0x92 0x1>,
<0x501 &pcie_smmu 0x93 0x1>;
};
46 changes: 46 additions & 0 deletions arch/arm64/boot/dts/qcom/monaco-staging.dtso
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Original file line number Diff line number Diff line change
Expand Up @@ -25,3 +25,49 @@
clock-names = "apb_pclk";
};
};

&pcie0 {
iommu-map = <0x0 &pcie_smmu 0x00 0x1>,
<0x100 &pcie_smmu 0x01 0x1>,
<0x101 &pcie_smmu 0x02 0x1>,
<0x208 &pcie_smmu 0x03 0x1>,
<0x210 &pcie_smmu 0x04 0x1>,
<0x218 &pcie_smmu 0x05 0x1>,
<0x280 &pcie_smmu 0x06 0x1>,
<0x282 &pcie_smmu 0x07 0x1>,
<0x284 &pcie_smmu 0x08 0x1>,
<0x286 &pcie_smmu 0x09 0x1>,
<0x288 &pcie_smmu 0x0a 0x1>,
<0x28a &pcie_smmu 0x0b 0x1>,
<0x28c &pcie_smmu 0x0c 0x1>,
<0x28e &pcie_smmu 0x0d 0x1>,
<0x290 &pcie_smmu 0x0e 0x1>,
<0x292 &pcie_smmu 0x0f 0x1>,
<0x300 &pcie_smmu 0x10 0x1>,
<0x400 &pcie_smmu 0x11 0x1>,
<0x500 &pcie_smmu 0x12 0x1>,
<0x501 &pcie_smmu 0x13 0x1>;
};

&pcie1 {
iommu-map = <0x0 &pcie_smmu 0x80 0x1>,
<0x100 &pcie_smmu 0x81 0x1>,
<0x101 &pcie_smmu 0x82 0x1>,
<0x208 &pcie_smmu 0x83 0x1>,
<0x210 &pcie_smmu 0x84 0x1>,
<0x218 &pcie_smmu 0x85 0x1>,
<0x280 &pcie_smmu 0x86 0x1>,
<0x282 &pcie_smmu 0x87 0x1>,
<0x284 &pcie_smmu 0x88 0x1>,
<0x286 &pcie_smmu 0x89 0x1>,
<0x288 &pcie_smmu 0x8a 0x1>,
<0x28a &pcie_smmu 0x8b 0x1>,
<0x28c &pcie_smmu 0x8c 0x1>,
<0x28e &pcie_smmu 0x8d 0x1>,
<0x290 &pcie_smmu 0x8e 0x1>,
<0x292 &pcie_smmu 0x8f 0x1>,
<0x300 &pcie_smmu 0x90 0x1>,
<0x400 &pcie_smmu 0x91 0x1>,
<0x500 &pcie_smmu 0x92 0x1>,
<0x501 &pcie_smmu 0x93 0x1>;
};