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CarolineConcattonavaneethshan
CarolineConcatto
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[Clang][AArch64]Remove _single from vg2x1 and vg4x1 svmla (#166799)
This patch follows the PR#421[1] from the ACLE These 2 FP8 intrinsics had single removed from them: from ``svmla[_single]_za16[_mf8]_vg2x1_fpm`` to ``svmla_za16[_mf8]_vg2x1_fpm`` and from ``svmla[_single]_za32[_mf8]_vg4x1_fpm`` to ``svmla_za32[_mf8]_vg4x1_fpm`` [1]ARM-software/acle#421
1 parent 1418127 commit b93e5d2

8 files changed

Lines changed: 38 additions & 34 deletions

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‎clang/include/clang/Basic/arm_sme.td‎

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -991,9 +991,10 @@ let SMETargetGuard = "sme-f8f32" in {
991991
[IsStreaming, IsInOutZA, IsOverloadNone], [ImmCheck<3, ImmCheck0_15>]>;
992992
def SVMLA_FP8_LANE_ZA16_VG4x4 : Inst<"svmla_lane_za32[_mf8]_vg4x4", "vm4di>", "m", MergeNone, "aarch64_sme_fp8_fmlall_lane_za32_vg4x4",
993993
[IsStreaming, IsInOutZA, IsOverloadNone], [ImmCheck<3, ImmCheck0_15>]>;
994+
// FMLALL
995+
def SVMLA_FP8_ZA32_VG4x1 : Inst<"svmla_za32[_mf8]_vg4x1", "vmdd>", "m", MergeNone, "aarch64_sme_fp8_fmlall_za32_vg4x1",
996+
[IsStreaming, IsInOutZA, IsOverloadNone], []>;
994997
// FMLALL (single)
995-
def SVMLA_FP8_SINGLE_ZA32_VG4x1 : Inst<"svmla[_single]_za32[_mf8]_vg4x1", "vmdd>", "m", MergeNone, "aarch64_sme_fp8_fmlall_single_za32_vg4x1",
996-
[IsStreaming, IsInOutZA, IsOverloadNone], []>;
997998
def SVMLA_FP8_SINGLE_ZA32_VG4x2 : Inst<"svmla[_single]_za32[_mf8]_vg4x2", "vm2d>", "m", MergeNone, "aarch64_sme_fp8_fmlall_single_za32_vg4x2",
998999
[IsStreaming, IsInOutZA, IsOverloadNone], []>;
9991000
def SVMLA_FP8_SINGLE_ZA32_VG4x4 : Inst<"svmla[_single]_za32[_mf8]_vg4x4", "vm4d>", "m", MergeNone, "aarch64_sme_fp8_fmlall_single_za32_vg4x4",
@@ -1015,9 +1016,10 @@ let SMETargetGuard = "sme-f8f16" in {
10151016
[IsStreaming, IsInOutZA, IsOverloadNone], [ImmCheck<3, ImmCheck0_15>]>;
10161017
def SVMLA_FP8_LANE_ZA16_VG2x4 : Inst<"svmla_lane_za16[_mf8]_vg2x4", "vm4di>", "m", MergeNone, "aarch64_sme_fp8_fmlal_lane_za16_vg2x4",
10171018
[IsStreaming, IsInOutZA, IsOverloadNone], [ImmCheck<3, ImmCheck0_15>]>;
1019+
// FMLAL
1020+
def SVMLA_FP8_ZA16_VG2x1 : Inst<"svmla_za16[_mf8]_vg2x1", "vmdd>", "m", MergeNone, "aarch64_sme_fp8_fmlal_za16_vg2x1",
1021+
[IsStreaming, IsInOutZA, IsOverloadNone], []>;
10181022
// FMLAL (single)
1019-
def SVMLA_FP8_SINGLE_ZA16_VG2x1 : Inst<"svmla[_single]_za16[_mf8]_vg2x1", "vmdd>", "m", MergeNone, "aarch64_sme_fp8_fmlal_single_za16_vg2x1",
1020-
[IsStreaming, IsInOutZA, IsOverloadNone], []>;
10211023
def SVMLA_FP8_SINGLE_ZA16_VG2x2 : Inst<"svmla[_single]_za16[_mf8]_vg2x2", "vm2d>", "m", MergeNone, "aarch64_sme_fp8_fmlal_single_za16_vg2x2",
10221024
[IsStreaming, IsInOutZA, IsOverloadNone], []>;
10231025
def SVMLA_FP8_SINGLE_ZA16_VG2x4 : Inst<"svmla[_single]_za16[_mf8]_vg2x4", "vm4d>", "m", MergeNone, "aarch64_sme_fp8_fmlal_single_za16_vg2x4",

‎clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sme2_fp8_mla.c‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -133,18 +133,18 @@ void test_svmla_lane_za32_vg4x4(uint32_t slice, svmfloat8x4_t zn, svmfloat8_t zm
133133
// CHECK-SAME: i32 noundef [[SLICE:%.*]], <vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0:[0-9]+]] {
134134
// CHECK-NEXT: [[ENTRY:.*:]]
135135
// CHECK-NEXT: tail call void @llvm.aarch64.set.fpmr(i64 [[FPM]])
136-
// CHECK-NEXT: tail call void @llvm.aarch64.sme.fp8.fmlal.single.za16.vg2x1(i32 [[SLICE]], <vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
136+
// CHECK-NEXT: tail call void @llvm.aarch64.sme.fp8.fmlal.za16.vg2x1(i32 [[SLICE]], <vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
137137
// CHECK-NEXT: ret void
138138
//
139139
// CPP-CHECK-LABEL: define dso_local void @_Z28test_svmla_single_za16_vg2x1ju13__SVMfloat8_tS_m(
140140
// CPP-CHECK-SAME: i32 noundef [[SLICE:%.*]], <vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0:[0-9]+]] {
141141
// CPP-CHECK-NEXT: [[ENTRY:.*:]]
142142
// CPP-CHECK-NEXT: tail call void @llvm.aarch64.set.fpmr(i64 [[FPM]])
143-
// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sme.fp8.fmlal.single.za16.vg2x1(i32 [[SLICE]], <vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
143+
// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sme.fp8.fmlal.za16.vg2x1(i32 [[SLICE]], <vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
144144
// CPP-CHECK-NEXT: ret void
145145
//
146146
void test_svmla_single_za16_vg2x1(uint32_t slice, svmfloat8_t zn, svmfloat8_t zm, fpm_t fpm) __arm_streaming __arm_inout("za") {
147-
SME_ACLE_FUNC(svmla,_single,_za16,_mf8,_vg2x1_fpm)(slice, zn, zm, fpm);
147+
SME_ACLE_FUNC(svmla_za16,_mf8,_vg2x1_fpm,,)(slice, zn, zm, fpm);
148148
}
149149

150150
// CHECK-LABEL: define dso_local void @test_svmla_single_za16_vg2x2(
@@ -189,18 +189,18 @@ void test_svmla_single_za16_vg2x4(uint32_t slice, svmfloat8x4_t zn, svmfloat8_t
189189
// CHECK-SAME: i32 noundef [[SLICE:%.*]], <vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {
190190
// CHECK-NEXT: [[ENTRY:.*:]]
191191
// CHECK-NEXT: tail call void @llvm.aarch64.set.fpmr(i64 [[FPM]])
192-
// CHECK-NEXT: tail call void @llvm.aarch64.sme.fp8.fmlall.single.za32.vg4x1(i32 [[SLICE]], <vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
192+
// CHECK-NEXT: tail call void @llvm.aarch64.sme.fp8.fmlall.za32.vg4x1(i32 [[SLICE]], <vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
193193
// CHECK-NEXT: ret void
194194
//
195195
// CPP-CHECK-LABEL: define dso_local void @_Z28test_svmla_single_za32_vg4x1ju13__SVMfloat8_tS_m(
196196
// CPP-CHECK-SAME: i32 noundef [[SLICE:%.*]], <vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]], i64 noundef [[FPM:%.*]]) #[[ATTR0]] {
197197
// CPP-CHECK-NEXT: [[ENTRY:.*:]]
198198
// CPP-CHECK-NEXT: tail call void @llvm.aarch64.set.fpmr(i64 [[FPM]])
199-
// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sme.fp8.fmlall.single.za32.vg4x1(i32 [[SLICE]], <vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
199+
// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sme.fp8.fmlall.za32.vg4x1(i32 [[SLICE]], <vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
200200
// CPP-CHECK-NEXT: ret void
201201
//
202202
void test_svmla_single_za32_vg4x1(uint32_t slice, svmfloat8_t zn, svmfloat8_t zm, fpm_t fpm) __arm_streaming __arm_inout("za") {
203-
SME_ACLE_FUNC(svmla,_single,_za32,_mf8,_vg4x1_fpm)(slice, zn, zm, fpm);
203+
SME_ACLE_FUNC(svmla_za32,_mf8,_vg4x1_fpm,,)(slice, zn, zm, fpm);
204204
}
205205

206206
// CHECK-LABEL: define dso_local void @test_svmla_single_za32_vg4x2(

‎clang/test/Sema/AArch64/arm_sme_streaming_only_sme_AND_sme-f8f16.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,7 @@ void test(void) __arm_inout("za"){
5252
// streaming-guard-error@+1 {{builtin can only be called from a streaming function}}
5353
svmla_lane_za16_vg2x4_fpm(uint32_t_val, svmfloat8x4_t_val, svmfloat8_t_val, 2, fpm_t_val);
5454
// streaming-guard-error@+1 {{builtin can only be called from a streaming function}}
55-
svmla_single_za16_mf8_vg2x1_fpm(uint32_t_val, svmfloat8_t_val, svmfloat8_t_val, fpm_t_val);
55+
svmla_za16_mf8_vg2x1_fpm(uint32_t_val, svmfloat8_t_val, svmfloat8_t_val, fpm_t_val);
5656
// streaming-guard-error@+1 {{builtin can only be called from a streaming function}}
5757
svmla_single_za16_mf8_vg2x2_fpm(uint32_t_val, svmfloat8x2_t_val, svmfloat8_t_val, fpm_t_val);
5858
// streaming-guard-error@+1 {{builtin can only be called from a streaming function}}
@@ -107,7 +107,7 @@ void test_streaming(void) __arm_streaming __arm_inout("za"){
107107
svmla_lane_za16_vg2x1_fpm(uint32_t_val, svmfloat8_t_val, svmfloat8_t_val, 2, fpm_t_val);
108108
svmla_lane_za16_vg2x2_fpm(uint32_t_val, svmfloat8x2_t_val, svmfloat8_t_val, 2, fpm_t_val);
109109
svmla_lane_za16_vg2x4_fpm(uint32_t_val, svmfloat8x4_t_val, svmfloat8_t_val, 2, fpm_t_val);
110-
svmla_single_za16_mf8_vg2x1_fpm(uint32_t_val, svmfloat8_t_val, svmfloat8_t_val, fpm_t_val);
110+
svmla_za16_mf8_vg2x1_fpm(uint32_t_val, svmfloat8_t_val, svmfloat8_t_val, fpm_t_val);
111111
svmla_single_za16_mf8_vg2x2_fpm(uint32_t_val, svmfloat8x2_t_val, svmfloat8_t_val, fpm_t_val);
112112
svmla_single_za16_mf8_vg2x4_fpm(uint32_t_val, svmfloat8x4_t_val, svmfloat8_t_val, fpm_t_val);
113113
svmla_za16_mf8_vg2x2_fpm(uint32_t_val, svmfloat8x2_t_val, svmfloat8x2_t_val, fpm_t_val);
@@ -168,7 +168,7 @@ void test_streaming_compatible(void) __arm_streaming_compatible __arm_inout("za"
168168
// streaming-guard-error@+1 {{builtin can only be called from a streaming function}}
169169
svmla_lane_za16_vg2x4_fpm(uint32_t_val, svmfloat8x4_t_val, svmfloat8_t_val, 2, fpm_t_val);
170170
// streaming-guard-error@+1 {{builtin can only be called from a streaming function}}
171-
svmla_single_za16_mf8_vg2x1_fpm(uint32_t_val, svmfloat8_t_val, svmfloat8_t_val, fpm_t_val);
171+
svmla_za16_mf8_vg2x1_fpm(uint32_t_val, svmfloat8_t_val, svmfloat8_t_val, fpm_t_val);
172172
// streaming-guard-error@+1 {{builtin can only be called from a streaming function}}
173173
svmla_single_za16_mf8_vg2x2_fpm(uint32_t_val, svmfloat8x2_t_val, svmfloat8_t_val, fpm_t_val);
174174
// streaming-guard-error@+1 {{builtin can only be called from a streaming function}}

‎clang/test/Sema/AArch64/arm_sme_streaming_only_sme_AND_sme-f8f32.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,7 @@ void test(void) __arm_inout("za"){
5252
// streaming-guard-error@+1 {{builtin can only be called from a streaming function}}
5353
svmla_lane_za32_vg4x4_fpm(uint32_t_val, svmfloat8x4_t_val, svmfloat8_t_val, 2, fpm_t_val);
5454
// streaming-guard-error@+1 {{builtin can only be called from a streaming function}}
55-
svmla_single_za32_mf8_vg4x1_fpm(uint32_t_val, svmfloat8_t_val, svmfloat8_t_val, fpm_t_val);
55+
svmla_za32_mf8_vg4x1_fpm(uint32_t_val, svmfloat8_t_val, svmfloat8_t_val, fpm_t_val);
5656
// streaming-guard-error@+1 {{builtin can only be called from a streaming function}}
5757
svmla_single_za32_mf8_vg4x2_fpm(uint32_t_val, svmfloat8x2_t_val, svmfloat8_t_val, fpm_t_val);
5858
// streaming-guard-error@+1 {{builtin can only be called from a streaming function}}
@@ -111,7 +111,7 @@ void test_streaming(void) __arm_streaming __arm_inout("za"){
111111
svmla_lane_za32_vg4x1_fpm(uint32_t_val, svmfloat8_t_val, svmfloat8_t_val, 2, fpm_t_val);
112112
svmla_lane_za32_vg4x2_fpm(uint32_t_val, svmfloat8x2_t_val, svmfloat8_t_val, 2, fpm_t_val);
113113
svmla_lane_za32_vg4x4_fpm(uint32_t_val, svmfloat8x4_t_val, svmfloat8_t_val, 2, fpm_t_val);
114-
svmla_single_za32_mf8_vg4x1_fpm(uint32_t_val, svmfloat8_t_val, svmfloat8_t_val, fpm_t_val);
114+
svmla_za32_mf8_vg4x1_fpm(uint32_t_val, svmfloat8_t_val, svmfloat8_t_val, fpm_t_val);
115115
svmla_single_za32_mf8_vg4x2_fpm(uint32_t_val, svmfloat8x2_t_val, svmfloat8_t_val, fpm_t_val);
116116
svmla_single_za32_mf8_vg4x4_fpm(uint32_t_val, svmfloat8x4_t_val, svmfloat8_t_val, fpm_t_val);
117117
svmla_za32_mf8_vg4x2_fpm(uint32_t_val, svmfloat8x2_t_val, svmfloat8x2_t_val, fpm_t_val);
@@ -174,7 +174,7 @@ void test_streaming_compatible(void) __arm_streaming_compatible __arm_inout("za"
174174
// streaming-guard-error@+1 {{builtin can only be called from a streaming function}}
175175
svmla_lane_za32_vg4x4_fpm(uint32_t_val, svmfloat8x4_t_val, svmfloat8_t_val, 2, fpm_t_val);
176176
// streaming-guard-error@+1 {{builtin can only be called from a streaming function}}
177-
svmla_single_za32_mf8_vg4x1_fpm(uint32_t_val, svmfloat8_t_val, svmfloat8_t_val, fpm_t_val);
177+
svmla_za32_mf8_vg4x1_fpm(uint32_t_val, svmfloat8_t_val, svmfloat8_t_val, fpm_t_val);
178178
// streaming-guard-error@+1 {{builtin can only be called from a streaming function}}
179179
svmla_single_za32_mf8_vg4x2_fpm(uint32_t_val, svmfloat8x2_t_val, svmfloat8_t_val, fpm_t_val);
180180
// streaming-guard-error@+1 {{builtin can only be called from a streaming function}}

‎clang/test/Sema/aarch64-fp8-intrinsics/acle_sme2_fp8_mla.c‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -24,17 +24,17 @@ void test_svmla(uint32_t slice, svmfloat8_t zn, svmfloat8x2_t znx2, svmfloat8x4_
2424
// expected-error@+1 {{'svmla_lane_za32_mf8_vg4x4_fpm' needs target feature sme,sme-f8f32}}
2525
svmla_lane_za32_mf8_vg4x4_fpm(slice, znx4, zn, 0, fpmr);
2626

27-
// expected-error@+1 {{'svmla_single_za16_mf8_vg2x1_fpm' needs target feature sme,sme-f8f16}}
28-
svmla_single_za16_mf8_vg2x1_fpm(slice, zn, zn, fpmr);
27+
// expected-error@+1 {{'svmla_za16_mf8_vg2x1_fpm' needs target feature sme,sme-f8f16}}
28+
svmla_za16_mf8_vg2x1_fpm(slice, zn, zn, fpmr);
2929

3030
// expected-error@+1 {{'svmla_single_za16_mf8_vg2x2_fpm' needs target feature sme,sme-f8f16}}
3131
svmla_single_za16_mf8_vg2x2_fpm(slice, znx2, zn, fpmr);
3232

3333
// expected-error@+1 {{'svmla_single_za16_mf8_vg2x4_fpm' needs target feature sme,sme-f8f16}}
3434
svmla_single_za16_mf8_vg2x4_fpm(slice, znx4, zn, fpmr);
3535

36-
// expected-error@+1 {{'svmla_single_za32_mf8_vg4x1_fpm' needs target feature sme,sme-f8f32}}
37-
svmla_single_za32_mf8_vg4x1_fpm(slice, zn, zn, fpmr);
36+
// expected-error@+1 {{'svmla_za32_mf8_vg4x1_fpm' needs target feature sme,sme-f8f32}}
37+
svmla_za32_mf8_vg4x1_fpm(slice, zn, zn, fpmr);
3838

3939
// expected-error@+1 {{'svmla_single_za32_mf8_vg4x2_fpm' needs target feature sme,sme-f8f32}}
4040
svmla_single_za32_mf8_vg4x2_fpm(slice, znx2, zn, fpmr);
@@ -53,4 +53,4 @@ void test_svmla(uint32_t slice, svmfloat8_t zn, svmfloat8x2_t znx2, svmfloat8x4_
5353

5454
// expected-error@+1 {{'svmla_za32_mf8_vg4x4_fpm' needs target feature sme,sme-f8f32}}
5555
svmla_za32_mf8_vg4x4_fpm(slice, znx4, znx4, fpmr);
56-
}
56+
}

‎llvm/include/llvm/IR/IntrinsicsAArch64.td‎

Lines changed: 9 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -4130,7 +4130,7 @@ let TargetPrefix = "aarch64" in {
41304130
llvm_nxv16i8_ty,
41314131
llvm_i32_ty],
41324132
[IntrInaccessibleMemOnly, ImmArg<ArgIndex<6>>]>;
4133-
class SME_FP8_ZA_SINGLE_VGx1_Intrinsic
4133+
class SME_FP8_ZA_VGx1_Intrinsic
41344134
: DefaultAttrsIntrinsic<[], [llvm_i32_ty,
41354135
llvm_nxv16i8_ty,
41364136
llvm_nxv16i8_ty],
@@ -4193,23 +4193,25 @@ let TargetPrefix = "aarch64" in {
41934193
def int_aarch64_sme_fp8_fmlal_lane_za16_vg2x1 : SME_FP8_ZA_LANE_VGx1_Intrinsic;
41944194
def int_aarch64_sme_fp8_fmlal_lane_za16_vg2x2 : SME_FP8_ZA_LANE_VGx2_Intrinsic;
41954195
def int_aarch64_sme_fp8_fmlal_lane_za16_vg2x4 : SME_FP8_ZA_LANE_VGx4_Intrinsic;
4196-
// Single
4197-
def int_aarch64_sme_fp8_fmlal_single_za16_vg2x1 : SME_FP8_ZA_SINGLE_VGx1_Intrinsic;
4196+
// Single-Single
4197+
def int_aarch64_sme_fp8_fmlal_za16_vg2x1 : SME_FP8_ZA_VGx1_Intrinsic;
4198+
// Multi-Single
41984199
def int_aarch64_sme_fp8_fmlal_single_za16_vg2x2 : SME_FP8_ZA_SINGLE_VGx2_Intrinsic;
41994200
def int_aarch64_sme_fp8_fmlal_single_za16_vg2x4 : SME_FP8_ZA_SINGLE_VGx4_Intrinsic;
4200-
// Multi
4201+
// Multi-Multi
42014202
def int_aarch64_sme_fp8_fmlal_multi_za16_vg2x2 : SME_FP8_ZA_MULTI_VGx2_Intrinsic;
42024203
def int_aarch64_sme_fp8_fmlal_multi_za16_vg2x4 : SME_FP8_ZA_MULTI_VGx4_Intrinsic;
42034204

42044205
// Quad-vector groups (F8F32)
42054206
def int_aarch64_sme_fp8_fmlall_lane_za32_vg4x1 : SME_FP8_ZA_LANE_VGx1_Intrinsic;
42064207
def int_aarch64_sme_fp8_fmlall_lane_za32_vg4x2 : SME_FP8_ZA_LANE_VGx2_Intrinsic;
42074208
def int_aarch64_sme_fp8_fmlall_lane_za32_vg4x4 : SME_FP8_ZA_LANE_VGx4_Intrinsic;
4208-
// Single
4209-
def int_aarch64_sme_fp8_fmlall_single_za32_vg4x1 : SME_FP8_ZA_SINGLE_VGx1_Intrinsic;
4209+
// Single-Single
4210+
def int_aarch64_sme_fp8_fmlall_za32_vg4x1 : SME_FP8_ZA_VGx1_Intrinsic;
4211+
// Multi-Single
42104212
def int_aarch64_sme_fp8_fmlall_single_za32_vg4x2 : SME_FP8_ZA_SINGLE_VGx2_Intrinsic;
42114213
def int_aarch64_sme_fp8_fmlall_single_za32_vg4x4 : SME_FP8_ZA_SINGLE_VGx4_Intrinsic;
4212-
// Multi
4214+
// Multi-Multi
42134215
def int_aarch64_sme_fp8_fmlall_multi_za32_vg4x2 : SME_FP8_ZA_MULTI_VGx2_Intrinsic;
42144216
def int_aarch64_sme_fp8_fmlall_multi_za32_vg4x4 : SME_FP8_ZA_MULTI_VGx4_Intrinsic;
42154217

‎llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1093,7 +1093,7 @@ defm FMLAL_MZZI_BtoH : sme2_fp8_fmlal_index_za16<"fmlal", int_aarch64_
10931093
defm FMLAL_VG2_M2ZZI_BtoH : sme2_fp8_fmlal_index_za16_vgx2<"fmlal", int_aarch64_sme_fp8_fmlal_lane_za16_vg2x2>;
10941094
defm FMLAL_VG4_M4ZZI_BtoH : sme2_fp8_fmlal_index_za16_vgx4<"fmlal", int_aarch64_sme_fp8_fmlal_lane_za16_vg2x4>;
10951095

1096-
defm FMLAL_VG2_MZZ_BtoH : sme2_fp8_fmlal_single_za16<"fmlal", int_aarch64_sme_fp8_fmlal_single_za16_vg2x1>;
1096+
defm FMLAL_VG2_MZZ_BtoH : sme2_fp8_fmlal_single_za16<"fmlal", int_aarch64_sme_fp8_fmlal_za16_vg2x1>;
10971097
defm FMLAL_VG2_M2ZZ_BtoH : sme2_fp_mla_long_array_vg2_single<"fmlal", 0b001, MatrixOp16, ZZ_b, ZPR4b8, nxv16i8, int_aarch64_sme_fp8_fmlal_single_za16_vg2x2, [FPMR, FPCR]>;
10981098
defm FMLAL_VG4_M4ZZ_BtoH : sme2_fp_mla_long_array_vg4_single<"fmlal", 0b001, MatrixOp16, ZZZZ_b, ZPR4b8, nxv16i8, int_aarch64_sme_fp8_fmlal_single_za16_vg2x4, [FPMR, FPCR]>;
10991099

@@ -1119,7 +1119,7 @@ defm FMLALL_MZZI_BtoS : sme2_mla_ll_array_index_32b<"fmlall", 0b01, 0b0
11191119
defm FMLALL_VG2_M2ZZI_BtoS : sme2_mla_ll_array_vg2_index_32b<"fmlall", 0b10, 0b100, int_aarch64_sme_fp8_fmlall_lane_za32_vg4x2, [FPMR, FPCR]>;
11201120
defm FMLALL_VG4_M4ZZI_BtoS : sme2_mla_ll_array_vg4_index_32b<"fmlall", 0b00, 0b1000, int_aarch64_sme_fp8_fmlall_lane_za32_vg4x4, [FPMR, FPCR]>;
11211121

1122-
defm FMLALL_MZZ_BtoS : sme2_mla_ll_array_single<"fmlall", 0b01000, MatrixOp32, ZPR8, ZPR4b8, nxv16i8, int_aarch64_sme_fp8_fmlall_single_za32_vg4x1, [FPMR, FPCR]>;
1122+
defm FMLALL_MZZ_BtoS : sme2_mla_ll_array_single<"fmlall", 0b01000, MatrixOp32, ZPR8, ZPR4b8, nxv16i8, int_aarch64_sme_fp8_fmlall_za32_vg4x1, [FPMR, FPCR]>;
11231123
defm FMLALL_VG2_M2ZZ_BtoS : sme2_mla_ll_array_vg2_single<"fmlall", 0b000001, MatrixOp32, ZZ_b, ZPR4b8, nxv16i8, int_aarch64_sme_fp8_fmlall_single_za32_vg4x2, [FPMR, FPCR]>;
11241124
defm FMLALL_VG4_M4ZZ_BtoS : sme2_mla_ll_array_vg4_single<"fmlall", 0b010001, MatrixOp32, ZZZZ_b, ZPR4b8, nxv16i8, int_aarch64_sme_fp8_fmlall_single_za32_vg4x4, [FPMR, FPCR]>;
11251125

‎llvm/test/CodeGen/AArch64/sme2-fp8-intrinsics-mla.ll‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -124,9 +124,9 @@ define void @test_fmlal_single_vg2x1(i32 %slice, <vscale x 16 x i8> %zn, <vscale
124124
; CHECK: fmlal za.h[w8, 0:1], z0.b, z1.b
125125
; CHECK: fmlal za.h[w8, 14:15], z0.b, z1.b
126126
; CHECK: ret
127-
call void @llvm.aarch64.sme.fp8.fmlal.single.za16.vg2x1(i32 %slice, <vscale x 16 x i8> %zn, <vscale x 16 x i8> %zm)
127+
call void @llvm.aarch64.sme.fp8.fmlal.za16.vg2x1(i32 %slice, <vscale x 16 x i8> %zn, <vscale x 16 x i8> %zm)
128128
%add = add i32 %slice, 14
129-
call void @llvm.aarch64.sme.fp8.fmlal.single.za16.vg2x1(i32 %add, <vscale x 16 x i8> %zn, <vscale x 16 x i8> %zm)
129+
call void @llvm.aarch64.sme.fp8.fmlal.za16.vg2x1(i32 %add, <vscale x 16 x i8> %zn, <vscale x 16 x i8> %zm)
130130
ret void
131131
}
132132

@@ -173,9 +173,9 @@ define void @test_fmlall_single_vg4x1(i32 %slice, <vscale x 16 x i8> %zn, <vscal
173173
; CHECK: fmlall za.s[w8, 0:3], z0.b, z1.b
174174
; CHECK: fmlall za.s[w8, 12:15], z0.b, z1.b
175175
; CHECK: ret
176-
call void @llvm.aarch64.sme.fp8.fmlall.single.za32.vg4x1(i32 %slice, <vscale x 16 x i8> %zn, <vscale x 16 x i8> %zm)
176+
call void @llvm.aarch64.sme.fp8.fmlall.za32.vg4x1(i32 %slice, <vscale x 16 x i8> %zn, <vscale x 16 x i8> %zm)
177177
%add = add i32 %slice, 12
178-
call void @llvm.aarch64.sme.fp8.fmlall.single.za32.vg4x1(i32 %add, <vscale x 16 x i8> %zn, <vscale x 16 x i8> %zm)
178+
call void @llvm.aarch64.sme.fp8.fmlall.za32.vg4x1(i32 %add, <vscale x 16 x i8> %zn, <vscale x 16 x i8> %zm)
179179
ret void
180180
}
181181

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