PCI: dw-rockchip: Disable root port BARs

Root port BARs waste MMIO space, preventing large devices like GPUs from
assigning their BARs.

Signed-off-by: Mario Bălănică <mariobalanica02@gmail.com>

Author: mariobalanica

drivers/pci/controller/dwc/pcie-dw-rockchip.c

@@ -74,6 +74,8 @@
 #define  PCIE_LINKUP_MASK		GENMASK(17, 16)
 #define  PCIE_LTSSM_STATUS_MASK		GENMASK(5, 0)
 
+#define PCIE_TYPE0_HDR_DBI2_OFFSET	0x100000
+
 struct rockchip_pcie {
 	struct dw_pcie pci;
 	void __iomem *apb_base;
@@ -266,6 +268,12 @@ static int rockchip_pcie_host_init(struct dw_pcie_rp *pp)
 
 	rockchip_pcie_enable_l0s(pci);
 
+	/* Disable root port BARs to avoid wasting MMIO space */
+	dw_pcie_dbi_ro_wr_en(pci);
+	dw_pcie_writel_dbi(pci, PCIE_TYPE0_HDR_DBI2_OFFSET + PCI_BASE_ADDRESS_0, 0);
+	dw_pcie_writel_dbi(pci, PCIE_TYPE0_HDR_DBI2_OFFSET + PCI_BASE_ADDRESS_1, 0);
+	dw_pcie_dbi_ro_wr_dis(pci);
+
 	return 0;
 }