PCI: pcie-brcmstb: add more safeguards for clkreq "safe" mode#6749
Merged
pelwell merged 1 commit intoraspberrypi:rpi-6.12.yfrom Apr 15, 2025
Merged
PCI: pcie-brcmstb: add more safeguards for clkreq "safe" mode#6749pelwell merged 1 commit intoraspberrypi:rpi-6.12.yfrom
pelwell merged 1 commit intoraspberrypi:rpi-6.12.yfrom
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The existing implementation for clkreq-mode="safe" leaves the HARD_DEBUG with both control bits clear. This can cause link failure if L1 sub-states are enabled and if either of these conditions occurrs: - The platform does not connect the CLRKEQ# signal to the EP, and a pull-up is present on the line - The platform connects the signal to the EP, and the EP enters an L1.x or ClkPM state Additional register bits in the HARD_DEBUG register can be used to force the RC to drive CLKREQ# low. Also, un-advertise L1ss as a) additional power savings can't be realised and b) enabling L1ss may incur additional wake latency from L1.0. Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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The existing implementation for clkreq-mode="safe" leaves the HARD_DEBUG with both control bits clear. This can cause link failure if L1 sub-states are enabled and if either of these conditions occurrs:
Additional register bits in the HARD_DEBUG register can be used to force the RC to drive CLKREQ# low. Also, un-advertise L1ss as a) additional power savings can't be realised and b) enabling L1ss may incur additional wake latency from L1.0.