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pelwell
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| brcm,fifo-qos-map = /bits/ 8 <3 3 3 3>; | ||
| status = "disabled"; | ||
| ranges = | ||
| /* 2GiB, 32-bit, non-prefetchable at PCIe 00_80000000 |
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Oops. Of course it booted with an nvme drive (64-bit BAR).
Upstream's base dts exposes a full-range 32bit MMIO window starting at a PCI bus address of 0. This causes sufficient interop annoyance to be worth permanently applying the mmio-hi property of the pciex1-compat-pi5 overlay. Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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See: raspberrypi/linux#6824 kernel: DT: arm: bcm2712: re-add mmio-hi ranges for pciex1 See: raspberrypi/linux#6825 kernel: Add DT controlled XTRIG control to imx296 See: raspberrypi/linux#6827 kernel: drm/v3d: Add job to pending list if the reset was skipped See: raspberrypi/linux#6822 kernel: drivers: media: i2c: imx335: Fix frame size enumeration See: raspberrypi/linux#6829
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See: raspberrypi/linux#6824 kernel: DT: arm: bcm2712: re-add mmio-hi ranges for pciex1 See: raspberrypi/linux#6825 kernel: Add DT controlled XTRIG control to imx296 See: raspberrypi/linux#6827 kernel: drm/v3d: Add job to pending list if the reset was skipped See: raspberrypi/linux#6822 kernel: drivers: media: i2c: imx335: Fix frame size enumeration See: raspberrypi/linux#6829
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Upstream's base dts exposes a full-range 32bit MMIO window starting at a PCI bus address of 0. This causes sufficient interop annoyance to be worth permanently applying the mmio-hi property of the pciex1-compat-pi5 overlay to the downstream dts.