chip8: fix branch reference operands losing instruction-specific formatting

Author: cornelk

internal/arch/chip8/chip8.go

@@ -172,6 +172,27 @@ func (c *Chip8) formatOffsetCode(offsetInfo *offset.DisasmOffset, instruction in
 	offsetInfo.Code = name
 }
 
+// FormatBranchReference formats an instruction with a branch or data destination label.
+func (c *Chip8) FormatBranchReference(offsetInfo *offset.DisasmOffset, label string) string {
+	opcode, ok := decodeOpcode(offsetInfo.Data)
+	if !ok {
+		return offset.FormatBranchReference(offsetInfo, label)
+	}
+
+	switch opcode & 0xF000 {
+	case 0x1000:
+		return fmt.Sprintf("%s %s", chip8.Jp.Name, label)
+	case 0x2000:
+		return fmt.Sprintf("%s %s", chip8.Call.Name, label)
+	case 0xA000:
+		return fmt.Sprintf("%s I, %s", chip8.Ld.Name, label)
+	case 0xB000:
+		return fmt.Sprintf("%s V0, %s", chip8.Jp.Name, label)
+	default:
+		return offset.FormatBranchReference(offsetInfo, label)
+	}
+}
+
 // handleControlFlow processes control flow based on instruction type
 func (c *Chip8) handleControlFlow(address uint16, offsetInfo *offset.DisasmOffset, instruction instruction.Instruction, instr Instruction) {
 	pc := c.dis.ProgramCounter()

internal/arch/m6502/format.go

@@ -0,0 +1,10 @@
+package m6502
+
+import (
+	"github.com/retroenv/retrodisasm/internal/offset"
+)
+
+// FormatBranchReference formats an instruction with a branch destination label.
+func (ar *Arch6502) FormatBranchReference(offsetInfo *offset.DisasmOffset, label string) string {
+	return offset.FormatBranchReference(offsetInfo, label)
+}

internal/disasm/code.go

@@ -52,7 +52,8 @@ func (dis *Disasm) processJumpDestinations() {
 
 			// reference can be a function address of a jump engine
 			if offsetInfo.IsType(program.CodeOffset) {
-				offsetInfo.Code = offsetInfo.Opcode.Instruction().Name()
+				offsetInfo.Code = dis.arch.FormatBranchReference(offsetInfo, name)
+				offsetInfo.BranchingTo = ""
 			}
 		}
 	}

internal/disasm/disasm.go

@@ -36,6 +36,8 @@ type architecture interface {
 	BankWindowSize(cart *cartridge.Cartridge) int
 	// Constants returns the constants translation map.
 	Constants() (map[uint16]consts.Constant, error)
+	// FormatBranchReference formats an instruction that references a branch or data label.
+	FormatBranchReference(offsetInfo *offset.DisasmOffset, label string) string
 	// HandleDisambiguousInstructions translates disambiguous instructions into data bytes.
 	HandleDisambiguousInstructions(address uint16, offsetInfo *offset.DisasmOffset) bool
 	// Initialize the architecture.

internal/disasm/disasm_test.go

@@ -8,9 +8,11 @@ import (
 	"strings"
 	"testing"
 
+	chip8arch "github.com/retroenv/retrodisasm/internal/arch/chip8"
 	"github.com/retroenv/retrodisasm/internal/arch/m6502"
 	"github.com/retroenv/retrodisasm/internal/assembler"
 	"github.com/retroenv/retrodisasm/internal/assembler/ca65"
+	"github.com/retroenv/retrodisasm/internal/assembler/retroasm"
 	"github.com/retroenv/retrodisasm/internal/options"
 	"github.com/retroenv/retrogolib/arch"
 	"github.com/retroenv/retrogolib/arch/system/nes/cartridge"
@@ -19,6 +21,24 @@ import (
 	"github.com/retroenv/retrogolib/log"
 )
 
+func TestDisasmChip8BranchReferenceOperands(t *testing.T) {
+	input := []byte{
+		0xa2, 0x08, // ld I, $208
+		0xb2, 0x0a, // jp V0, $20a
+		0x00, 0x00,
+		0x00, 0x00,
+		0x12, 0x34, // labeled data referenced by ld I
+		0x00, 0xee, // labeled ret target referenced by jp V0
+	}
+
+	output := runChip8Disasm(t, input)
+
+	assert.True(t, strings.Contains(output, "ld I, _label_0208"))
+	assert.True(t, strings.Contains(output, "jp V0, _label_020a"))
+	assert.False(t, strings.Contains(output, "ld _label_0208"))
+	assert.False(t, strings.Contains(output, "jp _label_020a"))
+}
+
 func TestDisasmZeroDataReference(t *testing.T) {
 	input := []byte{
 		0xad, 0x20, 0x80, // lda a:$8020
@@ -524,6 +544,36 @@ func testProgram(t *testing.T, opts options.Disassembler, cart *cartridge.Cartri
 	return disasm
 }
 
+func runChip8Disasm(t *testing.T, input []byte) string {
+	t.Helper()
+
+	opts := options.NewDisassembler(assembler.Retroasm, string(arch.CHIP8System))
+	opts.OffsetComments = false
+	opts.HexComments = false
+
+	cart := cartridge.New()
+	cart.PRG = make([]byte, len(input))
+	copy(cart.PRG, input)
+
+	logger := log.NewTestLogger(t)
+	disasm, err := New(logger, chip8arch.New(), cart, opts, retroasm.New)
+	assert.NoError(t, err)
+
+	var buffer bytes.Buffer
+	writer := bufio.NewWriter(&buffer)
+
+	newBankWriter := func(_ string) (io.WriteCloser, error) {
+		return nopWriteCloser{writer}, nil
+	}
+
+	app, err := disasm.Process(context.Background(), writer, newBankWriter)
+	assert.NoError(t, err)
+	assert.True(t, app != nil, "app should not be nil")
+	assert.NoError(t, writer.Flush())
+
+	return trimStringList(buffer.String())
+}
+
 func trimStringList(s string) string {
 	sl := strings.Split(s, "\n")
 	for i, s := range sl {

internal/offset/offset.go

@@ -2,6 +2,8 @@
 package offset
 
 import (
+	"fmt"
+
 	"github.com/retroenv/retrodisasm/internal/instruction"
 	"github.com/retroenv/retrodisasm/internal/program"
 )
@@ -32,6 +34,20 @@ type BankReference struct {
 	Index   uint16     // index in the bank
 }
 
+// FormatBranchReference formats an instruction with a branch destination label.
+func FormatBranchReference(offsetInfo *DisasmOffset, label string) string {
+	if offsetInfo.Opcode == nil {
+		return fmt.Sprintf("%s %s", offsetInfo.Code, label)
+	}
+
+	instr := offsetInfo.Opcode.Instruction()
+	if instr == nil || instr.IsNil() {
+		return fmt.Sprintf("%s %s", offsetInfo.Code, label)
+	}
+
+	return fmt.Sprintf("%s %s", instr.Name(), label)
+}
+
 // Mapper provides a mapper manager interface for architecture code.
 type Mapper interface {
 	MappedBank(address uint16) MappedBank