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4 | 4 |
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5 | 5 | /* |
6 | 6 | * This file is auto-generated by running 'make' in |
7 | | - * https://github.com/riscv/riscv-opcodes (4644ba3) |
| 7 | + * https://github.com/riscv/riscv-opcodes (eb5c51c) |
8 | 8 | */ |
9 | 9 |
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10 | 10 | #ifndef RISCV_CSR_ENCODING_H |
|
1725 | 1725 | #define MASK_VDIVU_VV 0xfc00707f |
1726 | 1726 | #define MATCH_VDIVU_VX 0x80006057 |
1727 | 1727 | #define MASK_VDIVU_VX 0xfc00707f |
| 1728 | +#define MATCH_VDOT4A_VV 0xb0002057 |
| 1729 | +#define MASK_VDOT4A_VV 0xfc00707f |
| 1730 | +#define MATCH_VDOT4A_VX 0xb0006057 |
| 1731 | +#define MASK_VDOT4A_VX 0xfc00707f |
| 1732 | +#define MATCH_VDOT4ASU_VV 0xa8002057 |
| 1733 | +#define MASK_VDOT4ASU_VV 0xfc00707f |
| 1734 | +#define MATCH_VDOT4ASU_VX 0xa8006057 |
| 1735 | +#define MASK_VDOT4ASU_VX 0xfc00707f |
| 1736 | +#define MATCH_VDOT4AU_VV 0xa0002057 |
| 1737 | +#define MASK_VDOT4AU_VV 0xfc00707f |
| 1738 | +#define MATCH_VDOT4AU_VX 0xa0006057 |
| 1739 | +#define MASK_VDOT4AU_VX 0xfc00707f |
| 1740 | +#define MATCH_VDOT4AUS_VX 0xb8006057 |
| 1741 | +#define MASK_VDOT4AUS_VX 0xfc00707f |
1728 | 1742 | #define MATCH_VFADD_VF 0x5057 |
1729 | 1743 | #define MASK_VFADD_VF 0xfc00707f |
1730 | 1744 | #define MATCH_VFADD_VV 0x1057 |
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2233 | 2247 | #define MASK_VQBDOTS_VV 0xfc00707f |
2234 | 2248 | #define MATCH_VQBDOTU_VV 0xb8000077 |
2235 | 2249 | #define MASK_VQBDOTU_VV 0xfc00707f |
2236 | | -#define MATCH_VQDOT_VV 0xb0002057 |
2237 | | -#define MASK_VQDOT_VV 0xfc00707f |
2238 | | -#define MATCH_VQDOT_VX 0xb0006057 |
2239 | | -#define MASK_VQDOT_VX 0xfc00707f |
2240 | | -#define MATCH_VQDOTSU_VV 0xa8002057 |
2241 | | -#define MASK_VQDOTSU_VV 0xfc00707f |
2242 | | -#define MATCH_VQDOTSU_VX 0xa8006057 |
2243 | | -#define MASK_VQDOTSU_VX 0xfc00707f |
2244 | | -#define MATCH_VQDOTU_VV 0xa0002057 |
2245 | | -#define MASK_VQDOTU_VV 0xfc00707f |
2246 | | -#define MATCH_VQDOTU_VX 0xa0006057 |
2247 | | -#define MASK_VQDOTU_VX 0xfc00707f |
2248 | | -#define MATCH_VQDOTUS_VX 0xb8006057 |
2249 | | -#define MASK_VQDOTUS_VX 0xfc00707f |
2250 | 2250 | #define MATCH_VQLDOTS_VV 0x9c000077 |
2251 | 2251 | #define MASK_VQLDOTS_VV 0xfc00707f |
2252 | 2252 | #define MATCH_VQLDOTU_VV 0x98000077 |
@@ -3724,6 +3724,13 @@ DECLARE_INSN(vdiv_vv, MATCH_VDIV_VV, MASK_VDIV_VV) |
3724 | 3724 | DECLARE_INSN(vdiv_vx, MATCH_VDIV_VX, MASK_VDIV_VX) |
3725 | 3725 | DECLARE_INSN(vdivu_vv, MATCH_VDIVU_VV, MASK_VDIVU_VV) |
3726 | 3726 | DECLARE_INSN(vdivu_vx, MATCH_VDIVU_VX, MASK_VDIVU_VX) |
| 3727 | +DECLARE_INSN(vdot4a_vv, MATCH_VDOT4A_VV, MASK_VDOT4A_VV) |
| 3728 | +DECLARE_INSN(vdot4a_vx, MATCH_VDOT4A_VX, MASK_VDOT4A_VX) |
| 3729 | +DECLARE_INSN(vdot4asu_vv, MATCH_VDOT4ASU_VV, MASK_VDOT4ASU_VV) |
| 3730 | +DECLARE_INSN(vdot4asu_vx, MATCH_VDOT4ASU_VX, MASK_VDOT4ASU_VX) |
| 3731 | +DECLARE_INSN(vdot4au_vv, MATCH_VDOT4AU_VV, MASK_VDOT4AU_VV) |
| 3732 | +DECLARE_INSN(vdot4au_vx, MATCH_VDOT4AU_VX, MASK_VDOT4AU_VX) |
| 3733 | +DECLARE_INSN(vdot4aus_vx, MATCH_VDOT4AUS_VX, MASK_VDOT4AUS_VX) |
3727 | 3734 | DECLARE_INSN(vfadd_vf, MATCH_VFADD_VF, MASK_VFADD_VF) |
3728 | 3735 | DECLARE_INSN(vfadd_vv, MATCH_VFADD_VV, MASK_VFADD_VV) |
3729 | 3736 | DECLARE_INSN(vfbdot_vv, MATCH_VFBDOT_VV, MASK_VFBDOT_VV) |
@@ -3978,13 +3985,6 @@ DECLARE_INSN(vpaire_vv, MATCH_VPAIRE_VV, MASK_VPAIRE_VV) |
3978 | 3985 | DECLARE_INSN(vpairo_vv, MATCH_VPAIRO_VV, MASK_VPAIRO_VV) |
3979 | 3986 | DECLARE_INSN(vqbdots_vv, MATCH_VQBDOTS_VV, MASK_VQBDOTS_VV) |
3980 | 3987 | DECLARE_INSN(vqbdotu_vv, MATCH_VQBDOTU_VV, MASK_VQBDOTU_VV) |
3981 | | -DECLARE_INSN(vqdot_vv, MATCH_VQDOT_VV, MASK_VQDOT_VV) |
3982 | | -DECLARE_INSN(vqdot_vx, MATCH_VQDOT_VX, MASK_VQDOT_VX) |
3983 | | -DECLARE_INSN(vqdotsu_vv, MATCH_VQDOTSU_VV, MASK_VQDOTSU_VV) |
3984 | | -DECLARE_INSN(vqdotsu_vx, MATCH_VQDOTSU_VX, MASK_VQDOTSU_VX) |
3985 | | -DECLARE_INSN(vqdotu_vv, MATCH_VQDOTU_VV, MASK_VQDOTU_VV) |
3986 | | -DECLARE_INSN(vqdotu_vx, MATCH_VQDOTU_VX, MASK_VQDOTU_VX) |
3987 | | -DECLARE_INSN(vqdotus_vx, MATCH_VQDOTUS_VX, MASK_VQDOTUS_VX) |
3988 | 3988 | DECLARE_INSN(vqldots_vv, MATCH_VQLDOTS_VV, MASK_VQLDOTS_VV) |
3989 | 3989 | DECLARE_INSN(vqldotu_vv, MATCH_VQLDOTU_VV, MASK_VQLDOTU_VV) |
3990 | 3990 | DECLARE_INSN(vredand_vs, MATCH_VREDAND_VS, MASK_VREDAND_VS) |
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