@@ -207,14 +207,25 @@ impl ScopedFtz {
207207 {
208208 #[ cfg( target_feature = "sse" ) ]
209209 {
210- let mode = unsafe { std:: arch:: x86_64:: _MM_GET_FLUSH_ZERO_MODE ( ) } ;
211- let should_disable_again = mode != std:: arch:: x86_64:: _MM_FLUSH_ZERO_ON;
210+ const X86_FTZ_BIT : u32 = 1 << 15 ;
211+ let mut mxcsr: u32 = 0 ;
212+ unsafe {
213+ std:: arch:: asm!(
214+ "stmxcsr [{p}]" ,
215+ p = in( reg) & mut mxcsr,
216+ options( nostack, preserves_flags) ,
217+ ) ;
218+ }
219+ let should_disable_again = ( mxcsr & X86_FTZ_BIT ) == 0 ;
212220 if should_disable_again {
221+ let new_mxcsr = mxcsr | X86_FTZ_BIT ;
213222 unsafe {
214- std:: arch:: x86_64:: _MM_SET_FLUSH_ZERO_MODE (
215- std:: arch:: x86_64:: _MM_FLUSH_ZERO_ON,
216- )
217- } ;
223+ std:: arch:: asm!(
224+ "ldmxcsr [{p}]" ,
225+ p = in( reg) & new_mxcsr,
226+ options( nostack, preserves_flags) ,
227+ ) ;
228+ }
218229 }
219230
220231 return Self {
@@ -257,11 +268,21 @@ impl Drop for ScopedFtz {
257268 if self . should_disable_again {
258269 #[ cfg( target_feature = "sse" ) ]
259270 {
271+ const X86_FTZ_BIT : u32 = 1 << 15 ;
272+ let mut mxcsr: u32 = 0 ;
260273 unsafe {
261- std:: arch:: x86_64:: _MM_SET_FLUSH_ZERO_MODE (
262- std:: arch:: x86_64:: _MM_FLUSH_ZERO_OFF,
263- )
264- } ;
274+ std:: arch:: asm!(
275+ "stmxcsr [{p}]" ,
276+ p = in( reg) & mut mxcsr,
277+ options( nostack, preserves_flags) ,
278+ ) ;
279+ let new_mxcsr = mxcsr & !X86_FTZ_BIT ;
280+ std:: arch:: asm!(
281+ "ldmxcsr [{p}]" ,
282+ p = in( reg) & new_mxcsr,
283+ options( nostack, preserves_flags) ,
284+ ) ;
285+ }
265286 }
266287
267288 #[ cfg( target_arch = "aarch64" ) ]
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