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feat[vepu511a]: Add tuning procedure for HEVC
Change-Id: I08bc66cc93ba0fe41f613062c785355c3cd8e653 Signed-off-by: timkingh.huang <timkingh.huang@rock-chips.com>
1 parent 111ea1a commit c2c1ee5

3 files changed

Lines changed: 205 additions & 8 deletions

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mpp/hal/rkenc/common/vepu511a_common.h

Lines changed: 52 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -829,7 +829,8 @@ typedef struct Vepu511aFrmCommon_t {
829829
RK_U32 cur_frm_ref : 1;
830830
RK_U32 mei_stor : 1;
831831
RK_U32 bs_scp : 1;
832-
RK_U32 reserved : 3;
832+
RK_U32 meiw_mode : 1;
833+
RK_U32 reserved : 2;
833834
RK_U32 pic_qp : 6;
834835
RK_U32 num_pic_tot_cur_hevc : 5;
835836
RK_U32 log2_ctu_num_hevc : 5;
@@ -2937,13 +2938,58 @@ typedef struct Vepu511aH264RoiBlkCfg {
29372938
} Vepu511aH264RoiBlkCfg;
29382939

29392940
typedef struct Vepu511aH265RoiBlkCfg {
2940-
RK_U32 qp_adju : 8;
2941-
RK_U32 reserved : 12;
2942-
RK_U32 mdc_adju_inter : 4;
2943-
RK_U32 mdc_adju_skip : 4;
2944-
RK_U32 mdc_adju_intra : 4;
2941+
RK_U32 qp_adju : 8;
2942+
RK_U32 mdc_adju_intra : 4;
2943+
RK_U32 mdc_adju_inter : 4;
2944+
RK_U32 mdc_adju_split : 4;
2945+
RK_U32 mdc_adju_res_intra : 4;
2946+
RK_U32 mdc_adju_res_inter : 4;
2947+
RK_U32 mdc_adju_res_mv0 : 4;
29452948
} Vepu511aH265RoiBlkCfg;
29462949

2950+
typedef struct Vepu511aH265RoiDpt1BlkCfg {
2951+
//W0
2952+
RK_U32 cu32_qp_adju : 8;
2953+
RK_U32 cu32_mdc_adju_intra : 4;
2954+
RK_U32 cu32_mdc_adju_inter : 4;
2955+
RK_U32 cu32_mdc_adju_split : 4;
2956+
RK_U32 cu32_mdc_adju_res_intra : 4;
2957+
RK_U32 cu32_mdc_adju_res_inter : 4;
2958+
RK_U32 cu32_mdc_adju_res_mv0 : 4;
2959+
//W1
2960+
RK_U32 cu16_0_qp_adju : 8;
2961+
RK_U32 cu16_0_mdc_adju_intra : 4;
2962+
RK_U32 cu16_0_mdc_adju_inter : 4;
2963+
RK_U32 cu16_0_mdc_adju_split : 4;
2964+
RK_U32 cu16_0_mdc_adju_res_intra : 4;
2965+
RK_U32 cu16_0_mdc_adju_res_inter : 4;
2966+
RK_U32 cu16_0_mdc_adju_res_mv0 : 4;
2967+
//W2
2968+
RK_U32 cu16_1_qp_adju : 8;
2969+
RK_U32 cu16_1_mdc_adju_intra : 4;
2970+
RK_U32 cu16_1_mdc_adju_inter : 4;
2971+
RK_U32 cu16_1_mdc_adju_split : 4;
2972+
RK_U32 cu16_1_mdc_adju_res_intra : 4;
2973+
RK_U32 cu16_1_mdc_adju_res_inter : 4;
2974+
RK_U32 cu16_1_mdc_adju_res_mv0 : 4;
2975+
//W3
2976+
RK_U32 cu16_2_qp_adju : 8;
2977+
RK_U32 cu16_2_mdc_adju_intra : 4;
2978+
RK_U32 cu16_2_mdc_adju_inter : 4;
2979+
RK_U32 cu16_2_mdc_adju_split : 4;
2980+
RK_U32 cu16_2_mdc_adju_res_intra : 4;
2981+
RK_U32 cu16_2_mdc_adju_res_inter : 4;
2982+
RK_U32 cu16_2_mdc_adju_res_mv0 : 4;
2983+
//W4
2984+
RK_U32 cu16_3_qp_adju : 8;
2985+
RK_U32 cu16_3_mdc_adju_intra : 4;
2986+
RK_U32 cu16_3_mdc_adju_inter : 4;
2987+
RK_U32 cu16_3_mdc_adju_split : 4;
2988+
RK_U32 cu16_3_mdc_adju_res_intra : 4;
2989+
RK_U32 cu16_3_mdc_adju_res_inter : 4;
2990+
RK_U32 cu16_3_mdc_adju_res_mv0 : 4;
2991+
} Vepu511aH265RoiDpt1BlkCfg;
2992+
29472993
#ifdef __cplusplus
29482994
extern "C" {
29492995
#endif

mpp/hal/rkenc/h265e/hal_h265e_vepu511a.c

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -158,6 +158,8 @@ typedef struct H265eV511AHalContext_t {
158158
void *tune;
159159
} H265eV511AHalContext;
160160

161+
#include "hal_h265e_vepu511a_tune.c"
162+
161163
static const RK_U32 lambda_tbl_pre_intra[52] = {
162164
4206, 4945, 5814, 6835, 8035, 9446, 11105, 13056,
163165
15348, 18044, 21213, 24938, 29318, 34467, 40521, 47637,
@@ -471,7 +473,7 @@ MPP_RET hal_h265e_vepu511a_deinit(void *hal)
471473
}
472474

473475
if (ctx->tune) {
474-
// vepu511a_h265e_tune_deinit(ctx->tune);
476+
vepu511a_h265e_tune_deinit(ctx->tune);
475477
ctx->tune = NULL;
476478
}
477479

@@ -538,7 +540,7 @@ MPP_RET hal_h265e_vepu511a_init(void *hal, MppEncHalCfg *cfg)
538540
ctx->output_cb = cfg->output_cb;
539541
cfg->cap_recn_out = 1;
540542

541-
// ctx->tune = vepu511a_h265e_tune_init(ctx);
543+
ctx->tune = vepu511a_h265e_tune_init(ctx);
542544

543545
DONE:
544546
if (ret)
@@ -2351,6 +2353,7 @@ MPP_RET hal_h265e_vepu511a_gen_regs(void *hal, HalEncTask *task)
23512353

23522354
/*paramet cfg*/
23532355
vepu511a_h265_global_cfg_set(ctx, regs);
2356+
vepu511a_h265e_tune_reg_patch(ctx->tune, task);
23542357

23552358
/* two pass register patch */
23562359
if (frm->save_pass1)
Lines changed: 148 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,148 @@
1+
/* SPDX-License-Identifier: Apache-2.0 */
2+
/*
3+
* Copyright (c) 2026 Rockchip Electronics Co., Ltd.
4+
*/
5+
6+
#include "hal_enc_task.h"
7+
#include "hal_h265e_vepu511a_reg.h"
8+
9+
typedef struct HalH265eVepu511aTune_t {
10+
H265eV511AHalContext *ctx;
11+
12+
MppBuffer md_info; /* internal md info buffer */
13+
RK_U8 *qm_mv_buf; /* qpmap move flag buffer */
14+
RK_U32 qm_mv_buf_size;
15+
} HalH265eVepu511aTune;
16+
17+
static HalH265eVepu511aTune *vepu511a_h265e_tune_init(H265eV511AHalContext *ctx)
18+
{
19+
HalH265eVepu511aTune *tune = mpp_calloc(HalH265eVepu511aTune, 1);
20+
21+
hal_h265e_dbg_func("enter\n");
22+
23+
if (NULL == tune)
24+
return tune;
25+
26+
tune->ctx = ctx;
27+
28+
hal_h265e_dbg_func("leave\n");
29+
30+
return tune;
31+
}
32+
33+
static void vepu511a_h265e_tune_deinit(void *tune)
34+
{
35+
HalH265eVepu511aTune *t = (HalH265eVepu511aTune *)tune;
36+
37+
hal_h265e_dbg_func("enter\n");
38+
39+
if (t->md_info) {
40+
mpp_buffer_put(t->md_info);
41+
t->md_info = NULL;
42+
}
43+
44+
MPP_FREE(t->qm_mv_buf);
45+
MPP_FREE(tune);
46+
hal_h265e_dbg_func("leave\n");
47+
}
48+
49+
static MPP_RET vepu511a_h265e_tune_qpmap_init(HalH265eVepu511aTune *tune, MppBuffer md_info)
50+
{
51+
H265eV511AHalContext *ctx = tune->ctx;
52+
Vepu511aH265eFrmCfg *frm = ctx->frm;
53+
H265eV511ARegSet *regs = frm->regs_set;
54+
H265eVepu511aFrame *reg_frm = &regs->reg_frm;
55+
RK_S32 w32 = MPP_ALIGN(ctx->cfg->prep.width, 32);
56+
RK_S32 h32 = MPP_ALIGN(ctx->cfg->prep.height, 32);
57+
RK_S32 roir_buf_fd = -1;
58+
59+
hal_h265e_dbg_func("enter\n");
60+
61+
if (frm->roi_data) {
62+
//TODO: external qpmap buffer
63+
} else {
64+
if (NULL == frm->roir_buf) {
65+
if (NULL == ctx->roi_grp)
66+
mpp_buffer_group_get_internal(&ctx->roi_grp, MPP_BUFFER_TYPE_ION);
67+
68+
//TODO: bmap_mdc_dpth = 1 ???
69+
frm->roir_buf_size = w32 * h32 / 256 * 4;
70+
mpp_buffer_get(ctx->roi_grp, &frm->roir_buf, frm->roir_buf_size);
71+
}
72+
73+
roir_buf_fd = mpp_buffer_get_fd(frm->roir_buf);
74+
}
75+
76+
if (NULL == frm->roir_buf) {
77+
mpp_err("failed to get roir_buf\n");
78+
return MPP_ERR_MALLOC;
79+
}
80+
reg_frm->common.adr_roir = roir_buf_fd;
81+
82+
if (NULL == tune->qm_mv_buf) {
83+
tune->qm_mv_buf_size = w32 * h32 / 256;
84+
tune->qm_mv_buf = mpp_calloc(RK_U8, tune->qm_mv_buf_size);
85+
if (NULL == tune->qm_mv_buf) {
86+
mpp_err("failed to get qm_mv_buf\n");
87+
return MPP_ERR_MALLOC;
88+
}
89+
}
90+
91+
if (NULL == md_info) {
92+
RK_S32 meir_size = w32 * h32 / 256 * 4; /* max 4 bytes for each CU16 */
93+
if (NULL == tune->md_info) {
94+
mpp_buffer_get(NULL, &tune->md_info, meir_size);
95+
}
96+
97+
if (tune->md_info) {
98+
reg_frm->common.enc_pic.mei_stor = 1;
99+
reg_frm->common.meiw_addr = mpp_buffer_get_fd(tune->md_info);
100+
} else {
101+
reg_frm->common.enc_pic.mei_stor = 0;
102+
reg_frm->common.meiw_addr = 0;
103+
return MPP_ERR_MALLOC;
104+
}
105+
hal_h265e_dbg_ctl("md_info_internal %p, size %d\n", tune->md_info, meir_size);
106+
}
107+
108+
hal_h265e_dbg_ctl("roir_buf_fd %d, size %d qm_mv_buf %p size %d\n",
109+
roir_buf_fd, frm->roir_buf_size, tune->qm_mv_buf,
110+
tune->qm_mv_buf_size);
111+
hal_h265e_dbg_func("leave\n");
112+
113+
return MPP_OK;
114+
}
115+
116+
static void vepu511a_h265e_tune_qpmap(void *p, HalEncTask *task)
117+
{
118+
MPP_RET ret = MPP_OK;
119+
HalH265eVepu511aTune *tune = (HalH265eVepu511aTune *)p;
120+
121+
(void)task;
122+
hal_h265e_dbg_func("enter\n");
123+
124+
ret = vepu511a_h265e_tune_qpmap_init(tune, task->md_info);
125+
if (ret != MPP_OK) {
126+
mpp_err("failed to init qpmap\n");
127+
return;
128+
}
129+
130+
hal_h265e_dbg_func("leave\n");
131+
}
132+
133+
static void vepu511a_h265e_tune_reg_patch(void *p, HalEncTask *task)
134+
{
135+
HalH265eVepu511aTune *tune = (HalH265eVepu511aTune *)p;
136+
137+
hal_h265e_dbg_func("enter\n");
138+
139+
if (NULL == tune)
140+
return;
141+
H265eV511AHalContext *ctx = tune->ctx;
142+
143+
if (ctx->qpmap_en) {
144+
vepu511a_h265e_tune_qpmap(tune, task);
145+
}
146+
147+
hal_h265e_dbg_func("leave\n");
148+
}

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