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HACK: cutoff something and rebase the 20180919
Rebase on the rockchip inside uboot next-dev branch: 5b2bcb4 usb: dwc2: fix the maximum dieptsizn/doeptsizn Change-Id: Ic2653ca9692ef3d7c92c5544f6d2ded622ee7c15 Signed-off-by: Caesar Wang <wxt@rock-chips.com>
1 parent 41c0dd9 commit b34cbcd

53 files changed

Lines changed: 1421 additions & 621 deletions

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arch/arm/cpu/armv7/start.S

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@@ -36,6 +36,8 @@
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.global switch_to_hypervisor_ret
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#endif
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39+
#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
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reset:
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/* Allow the board to save important registers */
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b save_boot_params
@@ -109,6 +111,8 @@ ENTRY(c_runtime_cpu_setup)
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110112
ENDPROC(c_runtime_cpu_setup)
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114+
#endif/* !CONFIG_IS_ENABLED(TINY_FRAMEWORK) */
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112116
/*************************************************************************
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*
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* void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)

arch/arm/dts/rk3328-u-boot.dtsi

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@@ -34,3 +34,19 @@
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&sdmmc {
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u-boot,dm-pre-reloc;
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};
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&usb20_otg {
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u-boot,dm-pre-reloc;
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};
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&usb2phy_grf {
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u-boot,dm-pre-reloc;
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};
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&u2phy {
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u-boot,dm-pre-reloc;
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};
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&u2phy_otg {
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u-boot,dm-pre-reloc;
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};

arch/arm/dts/rk3328.dtsi

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@@ -435,12 +435,6 @@
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u2phy: usb2-phy@100 {
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compatible = "rockchip,rk3328-usb2phy";
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reg = <0x100 0x10>;
438-
clocks = <&xin24m>;
439-
clock-names = "phyclk";
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clock-output-names = "usb480m_phy";
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#clock-cells = <0>;
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assigned-clocks = <&cru USB480M>;
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assigned-clock-parents = <&u2phy>;
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#phy-cells = <1>;
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status = "disabled";
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arch/arm/include/asm/arch-rockchip/boot0.h

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@@ -42,9 +42,17 @@
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#if (defined(CONFIG_SPL_BUILD) || defined(CONFIG_ARM64))
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/* U-Boot proper of armv7 do not need this */
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#if CONFIG_IS_ENABLED(TINY_FRAMEWORK) && defined(CONFIG_ARM64)
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#if CONFIG_IS_ENABLED(TINY_FRAMEWORK)
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#if !defined(CONFIG_ARM64)
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/*
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* For armv7, the addr '_start' will check by u-boot-tpl.lds file.
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*/
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_start:
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#endif
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/* Allow the board to save important registers */
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b save_boot_params
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.type save_boot_params_ret, % function
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.globl save_boot_params_ret
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save_boot_params_ret:
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b board_init_f
@@ -54,7 +62,7 @@
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#endif
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57-
#if !defined(CONFIG_ARM64)
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#if !defined(CONFIG_ARM64) && !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
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/*
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* For armv7, the addr '_start' will used as vector start address
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* and write to VBAR register, which needs to aligned to 0x20.
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@@ -0,0 +1,153 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2018 Rockchip Electronics Co., Ltd
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*
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*/
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#ifndef __RK_ATAGS_H_
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#define __RK_ATAGS_H_
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/* Tag magic */
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#define ATAG_CORE 0x54410001
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#define ATAG_NONE 0x00000000
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#define ATAG_SERIAL 0x54410050
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#define ATAG_BOOTDEV 0x54410051
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#define ATAG_DDR_MEM 0x54410052
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#define ATAG_TOS_MEM 0x54410053
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/* Tag size and offset */
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#define ATAGS_SIZE (0x2000) /* 8K */
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#define ATAGS_OFFSET (0x200000 - ATAGS_SIZE)/* [2M-8K, 2M] */
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/* Tag sdram position!! */
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#define ATAGS_PHYS_BASE (CONFIG_SYS_SDRAM_BASE + ATAGS_OFFSET)
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#ifndef ATAGS_PHYS_BASE
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"ERROR: ATAGS_PHYS_BASE is not defined!!"
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#endif
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/* tag_bootdev.devtype */
31+
#define BOOT_TYPE_EMMC 0x0
32+
#define BOOT_TYPE_NAND 0x1
33+
#define BOOT_TYPE_SDCARD 0x2
34+
#define BOOT_TYPE_SPI_NOR 0x3
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#define BOOT_TYPE_SPI_NAND 0x4
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/* tag_serial.m_mode */
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#define SERIAL_M_MODE_M0 0x0
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#define SERIAL_M_MODE_M1 0x1
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#define SERIAL_M_MODE_M2 0x2
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struct tag_serial {
43+
u32 version;
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u32 enable;
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u64 addr;
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u32 baudrate;
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u32 m_mode;
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u32 reserved[4];
49+
} __packed;
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struct tag_bootdev {
52+
u32 version;
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u32 devtype;
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u32 devnum;
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u32 mode;
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u32 reserved[8];
57+
} __packed;
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struct tag_ddr_mem {
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u32 count;
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u32 version;
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u64 bank[20];
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u32 reserved[4];
64+
} __packed;
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66+
struct tag_tos_mem {
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u32 version;
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struct {
69+
char name[8];
70+
u64 phy_addr;
71+
u32 size;
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u32 flags;
73+
} tee_mem;
74+
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struct {
76+
char name[8];
77+
u64 phy_addr;
78+
u32 size;
79+
u32 flags;
80+
} drm_mem;
81+
82+
u64 reserved[8];
83+
} __packed;
84+
85+
struct tag_core {
86+
u32 flags;
87+
u32 pagesize;
88+
u32 rootdev;
89+
} __packed;
90+
91+
struct tag_header {
92+
u32 size; /* bytes = size * 4 */
93+
u32 magic;
94+
} __packed;
95+
96+
/* Must be 4 bytes align */
97+
struct tag {
98+
struct tag_header hdr;
99+
union {
100+
struct tag_core core;
101+
struct tag_serial serial;
102+
struct tag_bootdev bootdev;
103+
struct tag_ddr_mem ddr_mem;
104+
struct tag_tos_mem tos_mem;
105+
} u;
106+
} __aligned(4);
107+
108+
/*
109+
* Destroy atags
110+
*
111+
* first pre-loader who creates atags must call it before atags_set_tag(),
112+
* because atags_set_tag() may detect last valid and existence ATAG_CORE
113+
* tag in memory and lead a wrong setup, that is not what we expect.
114+
*/
115+
void atags_destroy(void);
116+
117+
/*
118+
* atags_set_tag - set tag data
119+
*
120+
* @magic: tag magic, i.e. ATAG_SERIAL, ATAG_BOOTDEV, ....
121+
* @tagdata: core data of struct, i.e. struct tag_serial/tag_bootdev ...
122+
*
123+
* return: 0 on success, others failed.
124+
*/
125+
int atags_set_tag(u32 magic, void *tagdata);
126+
127+
/*
128+
* atags_get_tag - get tag by tag magic
129+
*
130+
* @magic: tag magic, i.e. ATAG_SERIAL, ATAG_BOOTDEV, ...
131+
*
132+
* return: NULL on failed, otherwise return the tag that we want.
133+
*/
134+
struct tag *atags_get_tag(u32 magic);
135+
136+
/*
137+
* atags_is_available - check if atags is available, used for second or
138+
* later pre-loaders.
139+
*
140+
* return: 0 is not available, otherwise available.
141+
*/
142+
int atags_is_available(void);
143+
144+
/* Print only one tag */
145+
void atags_print_tag(struct tag *t);
146+
147+
/* Print all tags */
148+
void atags_print_all_tags(void);
149+
150+
/* An atags example test */
151+
void atags_test(void);
152+
153+
#endif

arch/arm/mach-rockchip/Kconfig

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@@ -283,12 +283,30 @@ config ROCKCHIP_RV1108
283283
bool "Support Rockchip RV1108"
284284
select CPU_V7
285285
select SUPPORT_SPL
286+
select SUPPORT_TPL
286287
select SPL
288+
select TPL
287289
select BOARD_LATE_INIT
288290
help
289291
The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
290292
and a DSP.
291293

294+
if ROCKCHIP_RV1108
295+
296+
config TPL_LDSCRIPT
297+
default "arch/arm/mach-rockchip/u-boot-tpl.lds"
298+
299+
config TPL_TEXT_BASE
300+
default 0x10080800
301+
302+
config TPL_MAX_SIZE
303+
default 6144
304+
305+
config TPL_STACK
306+
default 0x10082000
307+
308+
endif
309+
292310
config SPL_ROCKCHIP_BACK_TO_BROM
293311
bool "SPL returns to bootrom"
294312
default y if ROCKCHIP_RK3036
@@ -473,6 +491,15 @@ config ROCKCHIP_CRASH_DUMP
473491
This enable dump registers when system crash, the registers you would like
474492
to dump can be added in show_regs().
475493

494+
config ROCKCHIP_PRELOADER_ATAGS
495+
bool "Rockchip pre-loader atags"
496+
default y if ARCH_ROCKCHIP
497+
help
498+
This enable support Rockchip atags among pre-loaders, i.e. ddr, miniloader, ATF,
499+
tos, U-Boot, etc. It delivers boot and configure information, shared with pre-loaders
500+
and finally ends with U-Boot.
501+
502+
476503
config GICV2
477504
bool "ARM GICv2"
478505

arch/arm/mach-rockchip/Makefile

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@@ -55,3 +55,5 @@ obj-spl-$(CONFIG_TPL_BUILD) =
5555
# Now add SPL/TPL objects back into the main build
5656
obj-$(CONFIG_SPL_BUILD) += $(obj-spl-y)
5757
obj-$(CONFIG_TPL_BUILD) += $(obj-tpl-y)
58+
59+
obj-$(CONFIG_ROCKCHIP_PRELOADER_ATAGS) += rk_atags.o

arch/arm/mach-rockchip/px30/px30.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -101,7 +101,7 @@ void board_debug_uart_init(void)
101101
GPIO2B5_GPIO = 0,
102102
GPIO2B5_PWM2,
103103

104-
GPIO2B4_SHIFT = 4,
104+
GPIO2B4_SHIFT = 0,
105105
GPIO2B4_MASK = 0xf << GPIO2B4_SHIFT,
106106
GPIO2B4_GPIO = 0,
107107
GPIO2B4_CIF_D0M0,
@@ -156,7 +156,7 @@ void board_debug_uart_init(void)
156156
GPIO1D1_GPIO = 0,
157157
GPIO1D1_SDIO_D3,
158158

159-
GPIO1D0_SHIFT = 4,
159+
GPIO1D0_SHIFT = 0,
160160
GPIO1D0_MASK = 0xf << GPIO1D0_SHIFT,
161161
GPIO1D0_GPIO = 0,
162162
GPIO1D0_SDIO_D2,

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