Add signed and unsigned remainder operations for RISC-V semantics#160
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Implement rules for `REM` and `REMU` instructions in `riscv.md`, detailing their behavior and special cases. Update syntax definitions in `word.md` to include remainder operations, and provide comprehensive handling for division by zero and overflow scenarios. Adjust test integration to utilize the `rv32em` architecture for relevant tests.
tothtamas28
reviewed
Aug 20, 2025
Implement expected result calculations for `REM` and `REMU` operations in `test_functions.py`. Introduce new test cases to validate behavior according to RISC-V specifications, including handling of division by zero and signed overflow scenarios.
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Implement rules for
REMandREMUinstructions inriscv.md, detailing their behavior and special cases. Update syntax definitions inword.mdto include remainder operations, and provide comprehensive handling for division by zero and overflow scenarios. Adjust test integration to utilize therv32emarchitecture for relevant tests.Close runtimeverification/zkevm-harness#80