@@ -260,7 +260,7 @@ bitflags::bitflags! {
260260}
261261
262262/// CSD V1 register structure.
263- #[ bitbybit:: bitfield( u128 , debug, defmt_fields( feature = "defmt-log" ) ) ]
263+ #[ bitbybit:: bitfield( u128 , debug, defmt_fields( feature = "defmt-log" ) , forbid_overlaps ) ]
264264pub struct CsdV1 {
265265 /// CSD_STRUCTURE field.
266266 #[ bits( 126 ..=127 , r) ]
@@ -287,10 +287,10 @@ pub struct CsdV1 {
287287 #[ bit( 78 , r) ]
288288 write_block_misalignment : bool ,
289289 /// READ_BLK_MISALIGN field.
290- #[ bit( 78 , r) ]
290+ #[ bit( 77 , r) ]
291291 read_block_misalignment : bool ,
292292 /// DSR_IMP field.
293- #[ bit( 77 , r) ]
293+ #[ bit( 76 , r) ]
294294 dsr_implemented : bool ,
295295 /// C_SIZE field.
296296 #[ bits( 62 ..=73 , r) ]
@@ -396,7 +396,7 @@ impl CsdV1 {
396396}
397397
398398/// CSD V2 register structure.
399- #[ bitbybit:: bitfield( u128 , debug, defmt_fields( feature = "defmt-log" ) ) ]
399+ #[ bitbybit:: bitfield( u128 , debug, defmt_fields( feature = "defmt-log" ) , forbid_overlaps ) ]
400400pub struct CsdV2 {
401401 /// CSD_STRUCTURE field.
402402 #[ bits( 126 ..=127 , r) ]
@@ -423,10 +423,10 @@ pub struct CsdV2 {
423423 #[ bit( 78 , r) ]
424424 write_block_misalignment : bool ,
425425 /// READ_BLK_MISALIGN field.
426- #[ bit( 78 , r) ]
426+ #[ bit( 77 , r) ]
427427 read_block_misalignment : bool ,
428428 /// DSR_IMP field.
429- #[ bit( 77 , r) ]
429+ #[ bit( 76 , r) ]
430430 dsr_implemented : bool ,
431431 /// C_SIZE field.
432432 #[ bits( 48 ..=69 , r) ]
@@ -500,7 +500,7 @@ impl CsdV2 {
500500}
501501
502502/// CSD V3 register structure.
503- #[ bitbybit:: bitfield( u128 , debug, defmt_fields( feature = "defmt-log" ) ) ]
503+ #[ bitbybit:: bitfield( u128 , debug, defmt_fields( feature = "defmt-log" ) , forbid_overlaps ) ]
504504pub struct CsdV3 {
505505 /// CSD_STRUCTURE field.
506506 #[ bits( 126 ..=127 , r) ]
@@ -527,10 +527,10 @@ pub struct CsdV3 {
527527 #[ bit( 78 , r) ]
528528 write_block_misalignment : bool ,
529529 /// READ_BLK_MISALIGN field.
530- #[ bit( 78 , r) ]
530+ #[ bit( 77 , r) ]
531531 read_block_misalignment : bool ,
532532 /// DSR_IMP field.
533- #[ bit( 77 , r) ]
533+ #[ bit( 76 , r) ]
534534 dsr_implemented : bool ,
535535 /// C_SIZE field.
536536 #[ bits( 48 ..=75 , r) ]
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