Fix prefetch-exception test.

thejpster · thejpster · commit 1c2c9f5e51ed · 2026-02-22T21:23:28.000Z
The addr check was accidentally cfg gated, when only the IFAR read
needs to be gated.
diff --git a/examples/versatileab/reference/prefetch-exception-a32-armv4t-none-eabi.out b/examples/versatileab/reference/prefetch-exception-a32-armv4t-none-eabi.out
@@ -2,9 +2,11 @@ Hello, this is a prefetch abort exception example
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_a32
 Doing it again
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_a32
 Skipping instruction
 Recovered from fault OK!
diff --git a/examples/versatileab/reference/prefetch-exception-a32-armv5te-none-eabi.out b/examples/versatileab/reference/prefetch-exception-a32-armv5te-none-eabi.out
@@ -2,9 +2,11 @@ Hello, this is a prefetch abort exception example
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_a32
 Doing it again
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_a32
 Skipping instruction
 Recovered from fault OK!
diff --git a/examples/versatileab/reference/prefetch-exception-a32-armv6-none-eabi.out b/examples/versatileab/reference/prefetch-exception-a32-armv6-none-eabi.out
@@ -2,9 +2,11 @@ Hello, this is a prefetch abort exception example
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_a32
 Doing it again
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_a32
 Skipping instruction
 Recovered from fault OK!
diff --git a/examples/versatileab/reference/prefetch-exception-a32-armv6-none-eabihf.out b/examples/versatileab/reference/prefetch-exception-a32-armv6-none-eabihf.out
@@ -2,9 +2,11 @@ Hello, this is a prefetch abort exception example
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_a32
 Doing it again
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_a32
 Skipping instruction
 Recovered from fault OK!
diff --git a/examples/versatileab/reference/prefetch-exception-a32-thumbv4t-none-eabi.out b/examples/versatileab/reference/prefetch-exception-a32-thumbv4t-none-eabi.out
@@ -2,9 +2,11 @@ Hello, this is a prefetch abort exception example
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_a32
 Doing it again
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_a32
 Skipping instruction
 Recovered from fault OK!
diff --git a/examples/versatileab/reference/prefetch-exception-a32-thumbv5te-none-eabi.out b/examples/versatileab/reference/prefetch-exception-a32-thumbv5te-none-eabi.out
@@ -2,9 +2,11 @@ Hello, this is a prefetch abort exception example
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_a32
 Doing it again
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_a32
 Skipping instruction
 Recovered from fault OK!
diff --git a/examples/versatileab/reference/prefetch-exception-a32-thumbv6-none-eabi.out b/examples/versatileab/reference/prefetch-exception-a32-thumbv6-none-eabi.out
@@ -2,9 +2,11 @@ Hello, this is a prefetch abort exception example
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_a32
 Doing it again
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_a32
 Skipping instruction
 Recovered from fault OK!
diff --git a/examples/versatileab/reference/prefetch-exception-t32-armv4t-none-eabi.out b/examples/versatileab/reference/prefetch-exception-t32-armv4t-none-eabi.out
@@ -2,9 +2,11 @@ Hello, this is a prefetch abort exception example
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_t32
 Doing it again
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_t32
 Skipping instruction
 Recovered from fault OK!
diff --git a/examples/versatileab/reference/prefetch-exception-t32-armv5te-none-eabi.out b/examples/versatileab/reference/prefetch-exception-t32-armv5te-none-eabi.out
@@ -2,9 +2,11 @@ Hello, this is a prefetch abort exception example
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_t32
 Doing it again
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_t32
 Skipping instruction
 Recovered from fault OK!
diff --git a/examples/versatileab/reference/prefetch-exception-t32-armv6-none-eabi.out b/examples/versatileab/reference/prefetch-exception-t32-armv6-none-eabi.out
@@ -2,9 +2,11 @@ Hello, this is a prefetch abort exception example
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_t32
 Doing it again
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_t32
 Skipping instruction
 Recovered from fault OK!
diff --git a/examples/versatileab/reference/prefetch-exception-t32-armv6-none-eabihf.out b/examples/versatileab/reference/prefetch-exception-t32-armv6-none-eabihf.out
@@ -2,9 +2,11 @@ Hello, this is a prefetch abort exception example
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_t32
 Doing it again
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_t32
 Skipping instruction
 Recovered from fault OK!
diff --git a/examples/versatileab/reference/prefetch-exception-t32-thumbv4t-none-eabi.out b/examples/versatileab/reference/prefetch-exception-t32-thumbv4t-none-eabi.out
@@ -2,9 +2,11 @@ Hello, this is a prefetch abort exception example
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_t32
 Doing it again
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_t32
 Skipping instruction
 Recovered from fault OK!
diff --git a/examples/versatileab/reference/prefetch-exception-t32-thumbv5te-none-eabi.out b/examples/versatileab/reference/prefetch-exception-t32-thumbv5te-none-eabi.out
@@ -2,9 +2,11 @@ Hello, this is a prefetch abort exception example
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_t32
 Doing it again
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_t32
 Skipping instruction
 Recovered from fault OK!
diff --git a/examples/versatileab/reference/prefetch-exception-t32-thumbv6-none-eabi.out b/examples/versatileab/reference/prefetch-exception-t32-thumbv6-none-eabi.out
@@ -2,9 +2,11 @@ Hello, this is a prefetch abort exception example
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_t32
 Doing it again
 prefetch abort occurred
 IFSR (Fault Status Register): IFSR { ext=false Domain=0b0000 Status=0b00010 }
 IFSR Status: Ok(DebugEvent)
+caught bkpt_from_t32
 Skipping instruction
 Recovered from fault OK!
diff --git a/examples/versatileab/src/bin/prefetch-exception-a32.rs b/examples/versatileab/src/bin/prefetch-exception-a32.rs
@@ -69,15 +69,15 @@ unsafe fn prefetch_abort_handler(addr: usize) -> usize {
     ))) {
         let ifar = Ifar::read();
         println!("IFAR (Faulting Address Register): {:?}", ifar);
+    }
 
-        if addr == bkpt_from_a32 as unsafe extern "C" fn() as usize {
-            println!("caught bkpt_from_a32");
-        } else {
-            println!(
-                "Bad fault address {:08x} is not {:08x}",
-                addr, bkpt_from_a32 as unsafe extern "C" fn() as usize
-            );
-        }
+    if addr == bkpt_from_a32 as unsafe extern "C" fn() as usize {
+        println!("caught bkpt_from_a32");
+    } else {
+        println!(
+            "Bad fault address {:08x} is not {:08x}",
+            addr, bkpt_from_a32 as unsafe extern "C" fn() as usize
+        );
     }
 
     let counter = COUNTER.load(Ordering::Relaxed);
diff --git a/examples/versatileab/src/bin/prefetch-exception-t32.rs b/examples/versatileab/src/bin/prefetch-exception-t32.rs
@@ -69,18 +69,18 @@ unsafe fn prefetch_abort_handler(addr: usize) -> usize {
     ))) {
         let ifar = Ifar::read();
         println!("IFAR (Faulting Address Register): {:?}", ifar);
+    }
 
-        if (addr + 1) == bkpt_from_t32 as unsafe extern "C" fn() as usize {
-            // note that thumb functions have their LSB set, despite always being a
-            // multiple of two - that's how the CPU knows they are written in T32
-            // machine code.
-            println!("caught bkpt_from_t32");
-        } else {
-            println!(
-                "Bad fault address {:08x} is not {:08x}",
-                addr, bkpt_from_t32 as unsafe extern "C" fn() as usize
-            );
-        }
+    if (addr + 1) == bkpt_from_t32 as unsafe extern "C" fn() as usize {
+        // note that thumb functions have their LSB set, despite always being a
+        // multiple of two - that's how the CPU knows they are written in T32
+        // machine code.
+        println!("caught bkpt_from_t32");
+    } else {
+        println!(
+            "Bad fault address {:08x} is not {:08x}",
+            addr, bkpt_from_t32 as unsafe extern "C" fn() as usize
+        );
     }
 
     let counter = COUNTER.load(Ordering::Relaxed);
