Add asm_cfg attribute.

The purpose of this attribute is to allow platforms that do not support the
asm instructions to compile code code that calls those functions. This is
needed so that clippy can be run once in CI and when testing locally.

This reverts 8d579b4 since it had a
conflicting method of making clippy builds include the function on all
targets.

Author: wt

Cargo.toml

@@ -2,6 +2,7 @@
 resolver = "3"
 members = [
     "cortex-m",
+    "cortex-m/macros",
     "cortex-m-types",
     "cortex-m-rt",
     "cortex-m-semihosting",

cortex-m/Cargo.toml

@@ -19,6 +19,7 @@ volatile-register = "0.2.2"
 bitfield = "0.13.2"
 eh0 = { package = "embedded-hal", version = "0.2.4" }
 eh1 = { package = "embedded-hal", version = "1.0.0" }
+cortex-m-macros = { path = "macros", version = "=0.1.0" }
 
 [dependencies.serde]
 version = "1"

cortex-m/macros/Cargo.toml

@@ -0,0 +1,21 @@
+[package]
+name = "cortex-m-macros"
+version = "0.1.0"
+edition = "2024"
+
+[lib]
+proc-macro = true
+
+[dependencies]
+proc-macro2 = "1.0.106"
+quote = "1.0.45"
+syn = { version = "2.0.117", features = ["extra-traits", "full"] }
+
+[dev-dependencies]
+macrotest = "1.2.1"
+
+[[bin]]
+name = "asm_cfg_fn_test"
+test = false
+bench = false
+path = "test_bin/asm_cfg_fn_test.rs"

cortex-m/macros/build.rs

@@ -0,0 +1,3 @@
+fn main() {
+    println!("cargo:rustc-check-cfg=cfg(testcfg)");
+}

cortex-m/macros/src/lib.rs

@@ -0,0 +1,53 @@
+//! Internal implementation details of `cortex-m`.
+//!
+//! Do not use this crate directly.
+
+extern crate proc_macro;
+
+use proc_macro::TokenStream;
+use quote::quote;
+use syn::{Item, Meta, parse_macro_input, parse_quote};
+
+#[proc_macro_attribute]
+pub fn asm_cfg(attr: TokenStream, item: TokenStream) -> TokenStream {
+    let cfg_expr = parse_macro_input!(attr as Meta);
+    let wrapped_item = parse_macro_input!(item as Item);
+
+    let new_item = match wrapped_item {
+        Item::Fn(f) => asm_cfg_wrap_fn(cfg_expr, f),
+        // TODO(wt): we should probably support modules as well
+        // Item::Mod(m) => asm_wrapper_wrap_mod(cfg_expr, m),
+        _ => unimplemented!(),
+    };
+
+    quote! {
+        #new_item
+    }
+    .into()
+}
+
+fn asm_cfg_wrap_fn(cfg_expr: Meta, mut f: syn::ItemFn) -> Item {
+    let old_block = f.block;
+    f.block = parse_quote! {
+        {
+            #[cfg(#cfg_expr)]
+            #old_block
+
+            #[cfg(not(#cfg_expr))]
+            unimplemented!()
+        }
+    };
+    parse_quote! {
+        #[allow(unused)]
+        #f
+    }
+}
+
+#[cfg(test)]
+mod tests {
+
+    #[test]
+    fn test_asm_cfg() {
+        macrotest::expand("proc_macro_tests/*.rs");
+    }
+}

cortex-m/macros/test_bin/asm_cfg_fn_test.expanded.rs

@@ -0,0 +1,5 @@
+use cortex_m_macros::asm_wrapper;
+#[allow(unused)]
+fn blah() {
+    ::core::panicking::panic("not implemented")
+}

cortex-m/macros/test_bin/asm_cfg_fn_test.rs

@@ -0,0 +1,8 @@
+use cortex_m_macros::asm_cfg;
+
+fn main() {}
+
+#[asm_cfg(testcfg)]
+fn blah() {
+    println!("")
+}

cortex-m/src/asm.rs

@@ -2,17 +2,19 @@
 
 #![allow(missing_docs)]
 
-#[cfg_attr(cortex_m, path = "asm/inner.rs")]
-#[cfg_attr(not(cortex_m), path = "asm/inner_mock.rs")]
+#[cfg(cortex_m)]
+use core::arch::asm;
+
 pub mod inner;
 
 /// Puts the processor in Debug state. Debuggers can pick this up as a "breakpoint".
 ///
 /// **NOTE** calling `bkpt` when the processor is not connected to a debugger will cause an
 /// exception.
 #[inline(always)]
+#[cortex_m_macros::asm_cfg(cortex_m)]
 pub fn bkpt() {
-    unsafe { inner::__bkpt() };
+    unsafe { asm!("bkpt", options(nomem, nostack, preserves_flags)) };
 }
 
 /// Blocks the program for *at least* `cycles` CPU cycles.
@@ -30,12 +32,14 @@ pub fn bkpt() {
 /// initialization of peripherals if and only if accurate timing is not essential. In any other case
 /// please use a more accurate method to produce a delay.
 #[inline]
+#[cortex_m_macros::asm_cfg(cortex_m)]
 pub fn delay(cycles: u32) {
     unsafe { inner::__delay(cycles) };
 }
 
 /// A no-operation. Useful to prevent delay loops from being optimized away.
 #[inline]
+#[cortex_m_macros::asm_cfg(cortex_m)]
 pub fn nop() {
     unsafe { inner::__nop() };
 }
@@ -44,24 +48,28 @@ pub fn nop() {
 ///
 /// Can be used as a stable alternative to `core::intrinsics::abort`.
 #[inline]
+#[cortex_m_macros::asm_cfg(cortex_m)]
 pub fn udf() -> ! {
     unsafe { inner::__udf() }
 }
 
 /// Wait For Event
 #[inline]
+#[cortex_m_macros::asm_cfg(cortex_m)]
 pub fn wfe() {
     unsafe { inner::__wfe() }
 }
 
 /// Wait For Interrupt
 #[inline]
+#[cortex_m_macros::asm_cfg(cortex_m)]
 pub fn wfi() {
     unsafe { inner::__wfi() }
 }
 
 /// Send Event
 #[inline]
+#[cortex_m_macros::asm_cfg(cortex_m)]
 pub fn sev() {
     unsafe { inner::__sev() }
 }
@@ -71,6 +79,7 @@ pub fn sev() {
 /// Flushes the pipeline in the processor, so that all instructions following the `ISB` are fetched
 /// from cache or memory, after the instruction has been completed.
 #[inline]
+#[cortex_m_macros::asm_cfg(cortex_m)]
 pub fn isb() {
     unsafe { inner::__isb() }
 }
@@ -83,6 +92,7 @@ pub fn isb() {
 ///  * any explicit memory access made before this instruction is complete
 ///  * all cache and branch predictor maintenance operations before this instruction complete
 #[inline]
+#[cortex_m_macros::asm_cfg(cortex_m)]
 pub fn dsb() {
     unsafe { inner::__dsb() }
 }
@@ -93,6 +103,7 @@ pub fn dsb() {
 /// instruction are observed before any explicit memory accesses that appear in program order
 /// after the `DMB` instruction.
 #[inline]
+#[cortex_m_macros::asm_cfg(cortex_m)]
 pub fn dmb() {
     unsafe { inner::__dmb() }
 }
@@ -103,7 +114,7 @@ pub fn dmb() {
 /// Returns a Test Target Response Payload (cf section D1.2.215 of
 /// Armv8-M Architecture Reference Manual).
 #[inline]
-#[cfg(armv8m)]
+#[cortex_m_macros::asm_cfg(armv8m)]
 // The __tt function does not dereference the pointer received.
 #[allow(clippy::not_unsafe_ptr_arg_deref)]
 pub fn tt(addr: *mut u32) -> u32 {
@@ -118,7 +129,7 @@ pub fn tt(addr: *mut u32) -> u32 {
 /// Returns a Test Target Response Payload (cf section D1.2.215 of
 /// Armv8-M Architecture Reference Manual).
 #[inline]
-#[cfg(armv8m)]
+#[cortex_m_macros::asm_cfg(armv8m)]
 // The __ttt function does not dereference the pointer received.
 #[allow(clippy::not_unsafe_ptr_arg_deref)]
 pub fn ttt(addr: *mut u32) -> u32 {
@@ -134,7 +145,7 @@ pub fn ttt(addr: *mut u32) -> u32 {
 /// Returns a Test Target Response Payload (cf section D1.2.215 of
 /// Armv8-M Architecture Reference Manual).
 #[inline]
-#[cfg(armv8m)]
+#[cortex_m_macros::asm_cfg(armv8m)]
 // The __tta function does not dereference the pointer received.
 #[allow(clippy::not_unsafe_ptr_arg_deref)]
 pub fn tta(addr: *mut u32) -> u32 {
@@ -150,7 +161,7 @@ pub fn tta(addr: *mut u32) -> u32 {
 /// Returns a Test Target Response Payload (cf section D1.2.215 of
 /// Armv8-M Architecture Reference Manual).
 #[inline]
-#[cfg(armv8m)]
+#[cortex_m_macros::asm_cfg(armv8m)]
 // The __ttat function does not dereference the pointer received.
 #[allow(clippy::not_unsafe_ptr_arg_deref)]
 pub fn ttat(addr: *mut u32) -> u32 {
@@ -163,7 +174,7 @@ pub fn ttat(addr: *mut u32) -> u32 {
 /// See section C2.4.26 of Armv8-M Architecture Reference Manual for details.
 /// Undefined if executed in Non-Secure state.
 #[inline]
-#[cfg(armv8m)]
+#[cortex_m_macros::asm_cfg(armv8m)]
 pub unsafe fn bx_ns(addr: u32) {
     unsafe { crate::asm::inner::__bxns(addr) };
 }
@@ -172,8 +183,12 @@ pub unsafe fn bx_ns(addr: u32) {
 ///
 /// This method is used by cortex-m-semihosting to provide semihosting syscalls.
 #[inline]
-pub unsafe fn semihosting_syscall(nr: u32, arg: u32) -> u32 {
-    unsafe { inner::__sh_syscall(nr, arg) }
+#[cortex_m_macros::asm_cfg(cortex_m)]
+pub unsafe fn semihosting_syscall(mut nr: u32, arg: u32) -> u32 {
+    unsafe {
+        asm!("bkpt #0xab", inout("r0") nr, in("r1") arg, options(nomem, nostack, preserves_flags))
+    };
+    nr
 }
 
 /// Switch to unprivileged mode using the Process Stack
@@ -192,8 +207,8 @@ pub unsafe fn semihosting_syscall(nr: u32, arg: u32) -> u32 {
 /// * The size of the stack provided here must be large enough for your
 ///   program - stack overflows are obviously UB. If your processor supports
 ///   it, you may wish to set the `PSPLIM` register to guard against this.
-#[cfg(cortex_m)]
 #[inline(always)]
+#[cortex_m_macros::asm_cfg(cortex_m)]
 pub unsafe fn enter_unprivileged_psp(psp: *const u32, entry: extern "C" fn() -> !) -> ! {
     use crate::register::control::{Control, Npriv, Spsel};
     const CONTROL_FLAGS: u32 = {
@@ -234,8 +249,8 @@ pub unsafe fn enter_unprivileged_psp(psp: *const u32, entry: extern "C" fn() ->
 /// * The size of the stack provided here must be large enough for your
 ///   program - stack overflows are obviously UB. If your processor supports
 ///   it, you may wish to set the `PSPLIM` register to guard against this.
-#[cfg(cortex_m)]
 #[inline(always)]
+#[cortex_m_macros::asm_cfg(cortex_m)]
 pub unsafe fn enter_privileged_psp(psp: *const u32, entry: extern "C" fn() -> !) -> ! {
     use crate::register::control::{Control, Npriv, Spsel};
     const CONTROL_FLAGS: u32 = {
@@ -272,6 +287,7 @@ pub unsafe fn enter_privileged_psp(psp: *const u32, entry: extern "C" fn() -> !)
 /// `msp` and `rv` must point to valid stack memory and executable code,
 /// respectively.
 #[inline]
+#[cortex_m_macros::asm_cfg(cortex_m)]
 pub unsafe fn bootstrap(msp: *const u32, rv: *const u32) -> ! {
     // Ensure thumb mode is set.
     let rv = (rv as u32) | 1;
@@ -292,6 +308,7 @@ pub unsafe fn bootstrap(msp: *const u32, rv: *const u32) -> ! {
 /// table, with a valid stack pointer as the first word and
 /// a valid reset vector as the second word.
 #[inline]
+#[cortex_m_macros::asm_cfg(cortex_m)]
 pub unsafe fn bootload(vector_table: *const u32) -> ! {
     unsafe {
         let msp = core::ptr::read_volatile(vector_table);