format

Author: robamu

cortex-m/src/peripheral/nvic.rs

@@ -120,7 +120,8 @@ impl NVIC {
         let nr = interrupt.number();
         // NOTE(unsafe) this is a write to a stateless register
         let mut nvic = unsafe { Self::steal() };
-        nvic.write_icer(usize::from(nr / 32), 1 << (nr % 32)).expect("invalid interrupt number");
+        nvic.write_icer(usize::from(nr / 32), 1 << (nr % 32))
+            .expect("invalid interrupt number");
     }
 
     /// Enables `interrupt`
@@ -134,7 +135,8 @@ impl NVIC {
         let nr = interrupt.number();
         // NOTE(ptr) this is a write to a stateless register
         let mut nvic = unsafe { Self::steal() };
-        nvic.write_iser(usize::from(nr / 32), 1 << (nr % 32)).expect("invalid interrupt number");
+        nvic.write_iser(usize::from(nr / 32), 1 << (nr % 32))
+            .expect("invalid interrupt number");
     }
 
     /// Returns the NVIC priority of `interrupt`