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Rollup merge of #157829 - durin42:llvm-23-pow-fix, r=mati865
tests: adapt two tests for LLVM 23 changes LLVM 23 recently changed SimplifyCFG to avoid integer lookup tables, and that perturbed these two tests in ways that look harmless to me.
2 parents 101eab9 + 1f7863d commit 5cdff6b

2 files changed

Lines changed: 33 additions & 13 deletions

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tests/codegen-llvm/issues/issue-118306.rs

Lines changed: 10 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
//@ compile-flags: -Copt-level=3
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//@ only-x86_64
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//@ revisions: LLVM22 LLVM23
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//@ [LLVM22] max-llvm-major-version: 22
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//@ [LLVM23] min-llvm-version: 23
36

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// Test for #118306.
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// Make sure we don't create `br` or `select` instructions.
@@ -11,9 +14,13 @@ pub fn branchy(input: u64) -> u64 {
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// CHECK-LABEL: @branchy(
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// CHECK-NEXT: start:
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// CHECK-NEXT: [[_2:%.*]] = and i64 [[INPUT:%.*]], 3
14-
// CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds{{( nuw)?}} {{\[4 x i64\]|i64|\[8 x i8\]}}, ptr @switch.table.branchy{{(, i64 0)?}}, i64 [[_2]]
15-
// CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i64, ptr [[SWITCH_GEP]]
16-
// CHECK-NEXT: ret i64 [[SWITCH_LOAD]]
17+
// LLVM22-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds{{( nuw)?}} {{\[4 x i64\]|i64|\[8 x i8\]}}, ptr @switch.table.branchy{{(, i64 0)?}}, i64 [[_2]]
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// LLVM22-NEXT: [[SWITCH_LOAD:%.*]] = load i64, ptr [[SWITCH_GEP]]
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// LLVM22-NEXT: ret i64 [[SWITCH_LOAD]]
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// LLVM23-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds{{( nuw)?}} i8, ptr @switch.table.branchy, i64 [[_2]]
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// LLVM23-NEXT: [[SWITCH_LOAD:%.*]] = load i8, ptr [[SWITCH_GEP]], align 1
22+
// LLVM23-NEXT: [[SWITCH_EXT:%.*]] = zext i8 [[SWITCH_LOAD]] to i64
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// LLVM23-NEXT: ret i64 [[SWITCH_EXT]]
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match input % 4 {
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1 | 2 => 1,
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3 => 2,

tests/codegen-llvm/pow_known_base.rs

Lines changed: 23 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,7 @@
11
//@ compile-flags: -Copt-level=3
2+
//@ revisions: LLVM22 LLVM23
3+
//@ [LLVM22] max-llvm-major-version: 22
4+
//@ [LLVM23] min-llvm-version: 23
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// Test that `pow` can use a faster implementation when `base` is a
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// known power of two
47

@@ -21,11 +24,16 @@ pub fn pow2(exp: u32) -> u32 {
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pub fn pow4(exp: u32) -> u32 {
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// CHECK: %[[ICMP1:.+]] = icmp slt i32 %exp, 0
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// CHECK: %[[SHIFT_AMOUNT:.+]] = shl i32 %exp, 1
24-
// CHECK: %[[ICMP2:.+]] = icmp ult i32 %[[SHIFT_AMOUNT]], 32
25-
// CHECK: %[[POW:.+]] = shl nuw i32 1, %[[SHIFT_AMOUNT]]
26-
// CHECK: %[[SEL:.+]] = select i1 %[[ICMP2]], i32 %[[POW]], i32 0
27-
// CHECK: %[[RET:.+]] = select i1 %[[ICMP1]], i32 0, i32 %[[SEL]]
28-
// CHECK: ret i32 %[[RET]]
27+
// LLVM22: %[[ICMP2:.+]] = icmp ult i32 %[[SHIFT_AMOUNT]], 32
28+
// LLVM22: %[[POW:.+]] = shl nuw i32 1, %[[SHIFT_AMOUNT]]
29+
// LLVM22: %[[SEL:.+]] = select i1 %[[ICMP2]], i32 %[[POW]], i32 0
30+
// LLVM22: %[[RET:.+]] = select i1 %[[ICMP1]], i32 0, i32 %[[SEL]]
31+
// LLVM22: ret i32 %[[RET]]
32+
// LLVM23: %[[ICMP2:.+]] = icmp ugt i32 %[[SHIFT_AMOUNT]], 31
33+
// LLVM23: %[[POW:.+]] = shl nuw i32 1, %[[SHIFT_AMOUNT]]
34+
// LLVM23: %[[COND:.+]] = or i1 %[[ICMP1]], %[[ICMP2]]
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// LLVM23: %[[RET:.+]] = select i1 %[[COND]], i32 0, i32 %[[POW]]
36+
// LLVM23: ret i32 %[[RET]]
2937
4u32.pow(exp)
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}
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@@ -35,11 +43,16 @@ pub fn pow4(exp: u32) -> u32 {
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pub fn pow16(exp: u32) -> u32 {
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// CHECK: %[[ICMP1:.+]] = icmp ugt i32 %exp, 1073741823
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// CHECK: %[[SHIFT_AMOUNT:.+]] = shl i32 %exp, 2
38-
// CHECK: %[[ICMP2:.+]] = icmp ult i32 %[[SHIFT_AMOUNT]], 32
39-
// CHECK: %[[POW:.+]] = shl nuw i32 1, %[[SHIFT_AMOUNT]]
40-
// CHECK: %[[SEL:.+]] = select i1 %[[ICMP2]], i32 %[[POW]], i32 0
41-
// CHECK: %[[RET:.+]] = select i1 %[[ICMP1]], i32 0, i32 %[[SEL]]
42-
// CHECK: ret i32 %[[RET]]
46+
// LLVM22: %[[ICMP2:.+]] = icmp ult i32 %[[SHIFT_AMOUNT]], 32
47+
// LLVM22: %[[POW:.+]] = shl nuw i32 1, %[[SHIFT_AMOUNT]]
48+
// LLVM22: %[[SEL:.+]] = select i1 %[[ICMP2]], i32 %[[POW]], i32 0
49+
// LLVM22: %[[RET:.+]] = select i1 %[[ICMP1]], i32 0, i32 %[[SEL]]
50+
// LLVM22: ret i32 %[[RET]]
51+
// LLVM23: %[[ICMP2:.+]] = icmp ugt i32 %[[SHIFT_AMOUNT]], 31
52+
// LLVM23: %[[POW:.+]] = shl nuw i32 1, %[[SHIFT_AMOUNT]]
53+
// LLVM23: %[[COND:.+]] = or i1 %[[ICMP1]], %[[ICMP2]]
54+
// LLVM23: %[[RET:.+]] = select i1 %[[COND]], i32 0, i32 %[[POW]]
55+
// LLVM23: ret i32 %[[RET]]
4356
16u32.pow(exp)
4457
}
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