Rollup merge of #157056 - esp-rs:update-xtensa-datalayout, r=folkertdev

Update Xtensa target data layouts to match upstream LLVM

Born from #156568 (comment).

We've been using a fork to distribute compiler builds that support the Xtensa arch whilst we're upstreaming. At a certain point we received some changes on our fork, which haven't been upstreamed, which I now to believe to be a mistake - therefore I'm reverting to the upstream LLVM datalayout.

r? @folkertdev

Author: JonathanBrouwer

compiler/rustc_target/src/spec/targets/xtensa_esp32_espidf.rs

@@ -7,7 +7,7 @@ pub(crate) fn target() -> Target {
     Target {
         llvm_target: "xtensa-none-elf".into(),
         pointer_width: 32,
-        data_layout: "e-m:e-p:32:32-v1:8:8-i64:64-i128:128-n32".into(),
+        data_layout: "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32".into(),
         arch: Arch::Xtensa,
         metadata: TargetMetadata { description: None, tier: Some(3), host_tools: None, std: None },
 

compiler/rustc_target/src/spec/targets/xtensa_esp32_none_elf.rs

@@ -5,7 +5,7 @@ pub(crate) fn target() -> Target {
     Target {
         llvm_target: "xtensa-none-elf".into(),
         pointer_width: 32,
-        data_layout: "e-m:e-p:32:32-v1:8:8-i64:64-i128:128-n32".into(),
+        data_layout: "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32".into(),
         arch: Arch::Xtensa,
         metadata: TargetMetadata {
             description: Some("Xtensa ESP32".into()),

compiler/rustc_target/src/spec/targets/xtensa_esp32s2_espidf.rs

@@ -7,7 +7,7 @@ pub(crate) fn target() -> Target {
     Target {
         llvm_target: "xtensa-none-elf".into(),
         pointer_width: 32,
-        data_layout: "e-m:e-p:32:32-v1:8:8-i64:64-i128:128-n32".into(),
+        data_layout: "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32".into(),
         arch: Arch::Xtensa,
         metadata: TargetMetadata { description: None, tier: Some(3), host_tools: None, std: None },
 

compiler/rustc_target/src/spec/targets/xtensa_esp32s2_none_elf.rs

@@ -5,7 +5,7 @@ pub(crate) fn target() -> Target {
     Target {
         llvm_target: "xtensa-none-elf".into(),
         pointer_width: 32,
-        data_layout: "e-m:e-p:32:32-v1:8:8-i64:64-i128:128-n32".into(),
+        data_layout: "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32".into(),
         arch: Arch::Xtensa,
         metadata: TargetMetadata {
             description: Some("Xtensa ESP32-S2".into()),

compiler/rustc_target/src/spec/targets/xtensa_esp32s3_espidf.rs

@@ -7,7 +7,7 @@ pub(crate) fn target() -> Target {
     Target {
         llvm_target: "xtensa-none-elf".into(),
         pointer_width: 32,
-        data_layout: "e-m:e-p:32:32-v1:8:8-i64:64-i128:128-n32".into(),
+        data_layout: "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32".into(),
         arch: Arch::Xtensa,
         metadata: TargetMetadata { description: None, tier: Some(3), host_tools: None, std: None },
 

compiler/rustc_target/src/spec/targets/xtensa_esp32s3_none_elf.rs

@@ -5,7 +5,7 @@ pub(crate) fn target() -> Target {
     Target {
         llvm_target: "xtensa-none-elf".into(),
         pointer_width: 32,
-        data_layout: "e-m:e-p:32:32-v1:8:8-i64:64-i128:128-n32".into(),
+        data_layout: "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32".into(),
         arch: Arch::Xtensa,
         metadata: TargetMetadata {
             description: Some("Xtensa ESP32-S3".into()),