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Unrolled build for #152576
Rollup merge of #152576 - folkertdev:mips-va-arg, r=tgross35 c-variadic: use `emit_ptr_va_arg` for mips tracking issue: #44930 After reading the implementation carefully, I believe it really is just `emit_ptr_va_arg`. The LLVM implementation can be found here: https://github.com/llvm/llvm-project/blob/289a3292be0c6a3df86bcdf5be7dd05b79a5570c/llvm/lib/Target/Mips/MipsISelLowering.cpp#L2338. r? workingjubilee
2 parents 92c7010 + e9ab558 commit cf9293c

2 files changed

Lines changed: 156 additions & 4 deletions

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‎compiler/rustc_codegen_llvm/src/va_arg.rs‎

Lines changed: 19 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1171,14 +1171,29 @@ pub(super) fn emit_va_arg<'ll, 'tcx>(
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AllowHigherAlign::Yes,
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ForceRightAdjust::No,
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),
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Arch::Mips | Arch::Mips32r6 | Arch::Mips64 | Arch::Mips64r6 => emit_ptr_va_arg(
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bx,
1176+
addr,
1177+
target_ty,
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PassMode::Direct,
1179+
match &target.llvm_abiname {
1180+
LlvmAbi::N32 | LlvmAbi::N64 => SlotSize::Bytes8,
1181+
LlvmAbi::O32 => SlotSize::Bytes4,
1182+
other => bug!("unexpected LLVM ABI {other}"),
1183+
},
1184+
AllowHigherAlign::Yes,
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// In big-endian mode the actual value is stored in the right side of the slot, meaning
1186+
// that when the value is smaller than a slot, we need to adjust the pointer we read
1187+
// to somewhere in the middle of the slot.
1188+
match bx.tcx().sess.target.endian {
1189+
Endian::Big => ForceRightAdjust::Yes,
1190+
Endian::Little => ForceRightAdjust::No,
1191+
},
1192+
),
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11751194
Arch::Bpf => bug!("bpf does not support c-variadic functions"),
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Arch::SpirV => bug!("spirv does not support c-variadic functions"),
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1178-
Arch::Mips | Arch::Mips32r6 | Arch::Mips64 | Arch::Mips64r6 => {
1179-
// FIXME: port MipsTargetLowering::lowerVAARG.
1180-
bx.va_arg(addr.immediate(), bx.cx.layout_of(target_ty).llvm_type(bx.cx))
1181-
}
11821197
Arch::Sparc | Arch::Avr | Arch::M68k | Arch::Msp430 => {
11831198
// Clang uses the LLVM implementation for these architectures.
11841199
bx.va_arg(addr.immediate(), bx.cx.layout_of(target_ty).llvm_type(bx.cx))

‎tests/assembly-llvm/c-variadic-mips.rs‎

Lines changed: 137 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,137 @@
1+
//@ add-minicore
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//@ assembly-output: emit-asm
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//
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//@ revisions: MIPS MIPS64 MIPS64EL
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//@ [MIPS] compile-flags: -Copt-level=3 --target mips-unknown-linux-gnu
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//@ [MIPS] needs-llvm-components: mips
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//@ [MIPS64] compile-flags: -Copt-level=3 --target mipsisa64r6-unknown-linux-gnuabi64
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//@ [MIPS64] needs-llvm-components: mips
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//@ [MIPS64EL] compile-flags: -Copt-level=3 --target mips64el-unknown-linux-gnuabi64
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//@ [MIPS64EL] needs-llvm-components: mips
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#![feature(c_variadic, no_core, lang_items, intrinsics, rustc_attrs, asm_experimental_arch)]
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#![no_core]
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#![crate_type = "lib"]
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// Check that the assembly that rustc generates matches what clang emits.
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extern crate minicore;
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use minicore::*;
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#[lang = "va_arg_safe"]
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pub unsafe trait VaArgSafe {}
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unsafe impl VaArgSafe for i32 {}
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unsafe impl VaArgSafe for i64 {}
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unsafe impl VaArgSafe for f64 {}
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unsafe impl<T> VaArgSafe for *const T {}
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#[repr(transparent)]
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struct VaListInner {
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ptr: *const c_void,
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}
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#[repr(transparent)]
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#[lang = "va_list"]
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pub struct VaList<'a> {
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inner: VaListInner,
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_marker: PhantomData<&'a mut ()>,
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}
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#[rustc_intrinsic]
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#[rustc_nounwind]
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pub const unsafe fn va_arg<T: VaArgSafe>(ap: &mut VaList<'_>) -> T;
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#[unsafe(no_mangle)]
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unsafe extern "C" fn read_f64(ap: &mut VaList<'_>) -> f64 {
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// CHECK-LABEL: read_f64
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//
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// MIPS: lw $1, 0($4)
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// MIPS-NEXT: addiu $2, $zero, -8
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// MIPS-NEXT: addiu $1, $1, 7
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// MIPS-NEXT: and $1, $1, $2
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// MIPS-NEXT: addiu $2, $1, 8
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// MIPS-NEXT: sw $2, 0($4)
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// MIPS-NEXT: ldc1 $f0, 0($1)
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// MIPS-NEXT: jr $ra
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// MIPS-NEXT: nop
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//
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// MIPS64: ld $1, 0($4)
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// MIPS64-NEXT: daddiu $2, $1, 8
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// MIPS64-NEXT: sd $2, 0($4)
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// MIPS64-NEXT: ldc1 $f0, 0($1)
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// MIPS64-NEXT: jrc $ra
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//
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// MIPS64EL: ld $1, 0($4)
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// MIPS64EL-NEXT: daddiu $2, $1, 8
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// MIPS64EL-NEXT: sd $2, 0($4)
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// MIPS64EL-NEXT: ldc1 $f0, 0($1)
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// MIPS64EL-NEXT: jr $ra
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// MIPS64EL-NEXT: nop
70+
va_arg(ap)
71+
}
72+
73+
#[unsafe(no_mangle)]
74+
unsafe extern "C" fn read_i32(ap: &mut VaList<'_>) -> i32 {
75+
// CHECK-LABEL: read_i32
76+
//
77+
// MIPS: lw $1, 0($4)
78+
// MIPS-NEXT: addiu $2, $1, 4
79+
// MIPS-NEXT: sw $2, 0($4)
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// MIPS-NEXT: lw $2, 0($1)
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// MIPS-NEXT: jr $ra
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// MIPS-NEXT: nop
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//
84+
// MIPS64: ld $1, 0($4)
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// MIPS64-NEXT: daddiu $2, $1, 8
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// MIPS64-NEXT: sd $2, 0($4)
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// MIPS64-NEXT: lw $2, 4($1)
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// MIPS64-NEXT: jrc $ra
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//
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// MIPS64EL: ld $1, 0($4)
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// MIPS64EL-NEXT: daddiu $2, $1, 8
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// MIPS64EL-NEXT: sd $2, 0($4)
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// MIPS64EL-NEXT: lw $2, 0($1)
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// MIPS64EL-NEXT: jr $ra
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// MIPS64EL-NEXT: nop
96+
va_arg(ap)
97+
}
98+
99+
#[unsafe(no_mangle)]
100+
unsafe extern "C" fn read_i64(ap: &mut VaList<'_>) -> i64 {
101+
// CHECK-LABEL: read_i64
102+
//
103+
// MIPS: lw $1, 0($4)
104+
// MIPS-NEXT: addiu $2, $zero, -8
105+
// MIPS-NEXT: addiu $1, $1, 7
106+
// MIPS-NEXT: and $2, $1, $2
107+
// MIPS-NEXT: addiu $3, $2, 8
108+
// MIPS-NEXT: sw $3, 0($4)
109+
// MIPS-NEXT: addiu $3, $zero, 4
110+
// MIPS-NEXT: lw $2, 0($2)
111+
// MIPS-NEXT: ins $1, $3, 0, 3
112+
// MIPS-NEXT: lw $3, 0($1)
113+
// MIPS-NEXT: jr $ra
114+
// MIPS-NEXT: nop
115+
//
116+
// MIPS64: ld $1, 0($4)
117+
// MIPS64-NEXT: daddiu $2, $1, 8
118+
// MIPS64-NEXT: sd $2, 0($4)
119+
// MIPS64-NEXT: ld $2, 0($1)
120+
// MIPS64-NEXT: jrc $ra
121+
//
122+
// MIPS64EL: ld $1, 0($4)
123+
// MIPS64EL-NEXT: daddiu $2, $1, 8
124+
// MIPS64EL-NEXT: sd $2, 0($4)
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// MIPS64EL-NEXT: ld $2, 0($1)
126+
// MIPS64EL-NEXT: jr $ra
127+
// MIPS64EL-NEXT: nop
128+
va_arg(ap)
129+
}
130+
131+
#[unsafe(no_mangle)]
132+
unsafe extern "C" fn read_ptr(ap: &mut VaList<'_>) -> *const u8 {
133+
// MIPS: read_ptr = read_i32
134+
// MIPS64: read_ptr = read_i64
135+
// MIPS64EL: read_ptr = read_i64
136+
va_arg(ap)
137+
}

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