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Merge pull request #909 from rust-lang/sync_from_rust_2026_07_14
Sync from rust 2026/07/14
2 parents 569b0b0 + 83a96cd commit 8d7b443

13 files changed

Lines changed: 121 additions & 97 deletions

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libgccjit.version

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1 +1 @@
1-
2f06e64df0dc15f861f77595b77bfc2ba5deb59d
1+
6249f1b21d0c17856c6fa87def9edd0eaa968caf

rust-toolchain

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,3 @@
11
[toolchain]
2-
channel = "nightly-2026-06-28"
2+
channel = "nightly-2026-07-14"
33
components = ["rust-src", "rustc-dev", "llvm-tools-preview"]

src/asm.rs

Lines changed: 25 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -719,7 +719,9 @@ fn reg_class_to_gcc(reg_class: InlineAsmRegClass) -> &'static str {
719719
unreachable!("clobber-only")
720720
}
721721
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::reg) => "r",
722-
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::freg) => "f",
722+
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::freg)
723+
| InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::vreg)
724+
| InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::xreg) => "f",
723725
InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => "r",
724726
InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr) => "a",
725727
InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data) => "d",
@@ -828,6 +830,12 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
828830
}
829831
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::reg) => cx.type_i32(),
830832
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::freg) => cx.type_f32(),
833+
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::vreg) => {
834+
cx.type_vector(cx.type_i32(), 4)
835+
}
836+
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::xreg) => {
837+
cx.type_vector(cx.type_i32(), 8)
838+
}
831839
InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => cx.type_i32(),
832840
InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => cx.type_f32(),
833841
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg16) => cx.type_i16(),
@@ -1026,7 +1034,22 @@ fn modifier_to_gcc(
10261034
}
10271035
}
10281036
InlineAsmRegClass::Hexagon(_) => None,
1029-
InlineAsmRegClass::LoongArch(_) => None,
1037+
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::reg) => None,
1038+
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::freg) => modifier,
1039+
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::vreg) => {
1040+
if modifier.is_none() {
1041+
Some('w')
1042+
} else {
1043+
modifier
1044+
}
1045+
}
1046+
InlineAsmRegClass::LoongArch(LoongArchInlineAsmRegClass::xreg) => {
1047+
if modifier.is_none() {
1048+
Some('u')
1049+
} else {
1050+
modifier
1051+
}
1052+
}
10301053
InlineAsmRegClass::Mips(_) => None,
10311054
InlineAsmRegClass::Nvptx(_) => None,
10321055
InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::vsreg) => {

src/base.rs

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,6 @@ use gccjit::{CType, FunctionType, GlobalKind};
55
use rustc_codegen_ssa::ModuleCodegen;
66
use rustc_codegen_ssa::base::maybe_create_entry_wrapper;
77
use rustc_codegen_ssa::mono_item::MonoItemExt;
8-
use rustc_codegen_ssa::traits::DebugInfoCodegenMethods;
98
use rustc_hir::attrs::{AttributeKind, Linkage};
109
use rustc_hir::find_attr;
1110
use rustc_middle::dep_graph;

src/builder.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1084,9 +1084,9 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
10841084
load
10851085
},
10861086
)
1087-
} else if let abi::BackendRepr::ScalarPair(ref a, ref b) = place.layout.backend_repr {
1088-
let b_offset = a.size(self).align_to(b.align(self).abi);
1089-
1087+
} else if let abi::BackendRepr::ScalarPair { ref a, ref b, b_offset } =
1088+
place.layout.backend_repr
1089+
{
10901090
let mut load = |i, scalar: &abi::Scalar, align| {
10911091
let ptr = if i == 0 {
10921092
place.val.llval
@@ -1175,7 +1175,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
11751175
// NOTE: libgccjit does not support specifying the alignment on the assignment, so we cast
11761176
// to type so it gets the proper alignment.
11771177
let destination_type = destination.to_rvalue().get_type().unqualified();
1178-
let align = if flags.contains(MemFlags::UNALIGNED) { 1 } else { align.bytes() };
1178+
let align = align.bytes();
11791179
let mut modified_destination_type = destination_type.get_aligned(align);
11801180
if flags.contains(MemFlags::VOLATILE) {
11811181
modified_destination_type = modified_destination_type.make_volatile();

src/common.rs

Lines changed: 10 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,8 @@ use gccjit::{LValue, RValue, ToRValue, Type};
22
use rustc_abi::Primitive::Pointer;
33
use rustc_abi::{self as abi, HasDataLayout};
44
use rustc_codegen_ssa::traits::{
5-
BaseTypeCodegenMethods, ConstCodegenMethods, MiscCodegenMethods, StaticCodegenMethods,
5+
BaseTypeCodegenMethods, ConstCodegenMethods, MiscCodegenMethods, PacMetadata,
6+
StaticCodegenMethods,
67
};
78
use rustc_middle::mir::Mutability;
89
use rustc_middle::mir::interpret::{GlobalAlloc, PointerArithmetic, Scalar};
@@ -231,7 +232,13 @@ impl<'gcc, 'tcx> ConstCodegenMethods for CodegenCx<'gcc, 'tcx> {
231232
None
232233
}
233234

234-
fn scalar_to_backend(&self, cv: Scalar, layout: abi::Scalar, ty: Type<'gcc>) -> RValue<'gcc> {
235+
fn scalar_to_backend_with_pac(
236+
&self,
237+
cv: Scalar,
238+
layout: abi::Scalar,
239+
ty: Type<'gcc>,
240+
_pac: Option<PacMetadata>,
241+
) -> RValue<'gcc> {
235242
let bitsize = if layout.is_bool() { 1 } else { layout.size(self).bits() };
236243
match cv {
237244
Scalar::Int(int) => {
@@ -280,7 +287,7 @@ impl<'gcc, 'tcx> ConstCodegenMethods for CodegenCx<'gcc, 'tcx> {
280287
}
281288
value
282289
}
283-
GlobalAlloc::Function { instance, .. } => self.get_fn_addr(instance),
290+
GlobalAlloc::Function { instance, .. } => self.get_fn_addr(instance, None),
284291
GlobalAlloc::VTable(ty, dyn_ty) => {
285292
let alloc = self
286293
.tcx

src/context.rs

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,9 @@ use gccjit::{Block, CType, Context, Function, FunctionType, LValue, Location, RV
55
use rustc_abi::{Align, HasDataLayout, PointeeInfo, Size, TargetDataLayout, VariantIdx};
66
use rustc_codegen_ssa::base::wants_msvc_seh;
77
use rustc_codegen_ssa::errors as ssa_errors;
8-
use rustc_codegen_ssa::traits::{BackendTypes, BaseTypeCodegenMethods, MiscCodegenMethods};
8+
use rustc_codegen_ssa::traits::{
9+
BackendTypes, BaseTypeCodegenMethods, MiscCodegenMethods, PacMetadata,
10+
};
911
use rustc_data_structures::base_n::{ALPHANUMERIC_ONLY, ToBaseN};
1012
use rustc_data_structures::fx::{FxHashMap, FxHashSet};
1113
use rustc_middle::mir::interpret::Allocation;
@@ -398,7 +400,7 @@ impl<'gcc, 'tcx> MiscCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
398400
get_fn(self, instance)
399401
}
400402

401-
fn get_fn_addr(&self, instance: Instance<'tcx>) -> RValue<'gcc> {
403+
fn get_fn_addr(&self, instance: Instance<'tcx>, _pac: Option<PacMetadata>) -> RValue<'gcc> {
402404
let func_name = self.tcx.symbol_name(instance).name;
403405

404406
let func = if let Some(variable) = self.get_declared_value(func_name) {

src/debuginfo.rs

Lines changed: 64 additions & 64 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,66 @@ pub(super) const UNKNOWN_LINE_NUMBER: u32 = 0;
1616
pub(super) const UNKNOWN_COLUMN_NUMBER: u32 = 0;
1717

1818
impl<'a, 'gcc, 'tcx> DebugInfoBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
19+
fn dbg_scope_fn(
20+
&mut self,
21+
_instance: Instance<'tcx>,
22+
_fn_abi: &FnAbi<'tcx, Ty<'tcx>>,
23+
_maybe_definition_llfn: Option<Function<'gcc>>,
24+
) -> Self::DIScope {
25+
// FIXME(antoyo): implement.
26+
}
27+
28+
fn dbg_create_lexical_block(
29+
&mut self,
30+
_pos: BytePos,
31+
_parent_scope: Self::DIScope,
32+
) -> Self::DIScope {
33+
}
34+
35+
fn dbg_location_clone_with_discriminator(
36+
&mut self,
37+
loc: Self::DILocation,
38+
_discriminator: u32,
39+
) -> Option<Self::DILocation> {
40+
Some(loc)
41+
}
42+
43+
fn extend_scope_to_file(
44+
&mut self,
45+
_scope_metadata: Self::DIScope,
46+
_file: &SourceFile,
47+
) -> Self::DIScope {
48+
// FIXME(antoyo): implement.
49+
}
50+
51+
fn dbg_loc(
52+
&mut self,
53+
_scope: Self::DIScope,
54+
_inlined_at: Option<Self::DILocation>,
55+
span: Span,
56+
) -> Self::DILocation {
57+
let pos = span.lo();
58+
let DebugLoc { file, line, col } = self.lookup_debug_loc(pos);
59+
match file.name {
60+
rustc_span::FileName::Real(ref name) => self.context.new_location(
61+
name.path(rustc_span::RemapPathScopeComponents::DEBUGINFO).to_string_lossy(),
62+
line as i32,
63+
col as i32,
64+
),
65+
_ => Location::null(),
66+
}
67+
}
68+
69+
fn create_dbg_var(
70+
&mut self,
71+
_variable_name: Symbol,
72+
_variable_type: Ty<'tcx>,
73+
_scope_metadata: Self::DIScope,
74+
_variable_kind: VariableKind,
75+
_span: Span,
76+
) -> Self::DIVariable {
77+
}
78+
1979
// FIXME(eddyb) find a common convention for all of the debuginfo-related
2080
// names (choose between `dbg`, `debug`, `debuginfo`, `debug_info` etc.).
2181
fn dbg_var_addr(
@@ -103,6 +163,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
103163
DebugLoc { file, line, col }
104164
}
105165
}
166+
167+
pub(crate) fn debuginfo_finalize(&self) {
168+
self.context.set_debug_info(true)
169+
}
106170
}
107171

108172
impl<'gcc, 'tcx> DebugInfoCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
@@ -114,68 +178,4 @@ impl<'gcc, 'tcx> DebugInfoCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
114178
) {
115179
// FIXME(antoyo)
116180
}
117-
118-
fn dbg_create_lexical_block(
119-
&self,
120-
_pos: BytePos,
121-
_parent_scope: Self::DIScope,
122-
) -> Self::DIScope {
123-
}
124-
125-
fn dbg_location_clone_with_discriminator(
126-
&self,
127-
loc: Self::DILocation,
128-
_discriminator: u32,
129-
) -> Option<Self::DILocation> {
130-
Some(loc)
131-
}
132-
133-
fn extend_scope_to_file(
134-
&self,
135-
_scope_metadata: Self::DIScope,
136-
_file: &SourceFile,
137-
) -> Self::DIScope {
138-
// FIXME(antoyo): implement.
139-
}
140-
141-
fn debuginfo_finalize(&self) {
142-
self.context.set_debug_info(true)
143-
}
144-
145-
fn create_dbg_var(
146-
&self,
147-
_variable_name: Symbol,
148-
_variable_type: Ty<'tcx>,
149-
_scope_metadata: Self::DIScope,
150-
_variable_kind: VariableKind,
151-
_span: Span,
152-
) -> Self::DIVariable {
153-
}
154-
155-
fn dbg_scope_fn(
156-
&self,
157-
_instance: Instance<'tcx>,
158-
_fn_abi: &FnAbi<'tcx, Ty<'tcx>>,
159-
_maybe_definition_llfn: Option<Function<'gcc>>,
160-
) -> Self::DIScope {
161-
// FIXME(antoyo): implement.
162-
}
163-
164-
fn dbg_loc(
165-
&self,
166-
_scope: Self::DIScope,
167-
_inlined_at: Option<Self::DILocation>,
168-
span: Span,
169-
) -> Self::DILocation {
170-
let pos = span.lo();
171-
let DebugLoc { file, line, col } = self.lookup_debug_loc(pos);
172-
match file.name {
173-
rustc_span::FileName::Real(ref name) => self.context.new_location(
174-
name.path(rustc_span::RemapPathScopeComponents::DEBUGINFO).to_string_lossy(),
175-
line as i32,
176-
col as i32,
177-
),
178-
_ => Location::null(),
179-
}
180-
}
181181
}

src/intrinsic/llvm.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1100,7 +1100,7 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
11001100
#[cfg(feature = "master")]
11011101
pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> {
11021102
let gcc_name = match name {
1103-
"llvm.prefetch" => {
1103+
"llvm.prefetch.p0" => {
11041104
let gcc_name = "__builtin_prefetch";
11051105
let func = cx.context.get_builtin_function(gcc_name);
11061106
cx.functions.borrow_mut().insert(gcc_name.to_string(), func);

src/intrinsic/mod.rs

Lines changed: 1 addition & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -376,16 +376,6 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc
376376
load
377377
}
378378
}
379-
sym::volatile_store => {
380-
let dst = args[0].deref(self.cx());
381-
args[1].val.volatile_store(self, dst);
382-
return IntrinsicResult::WroteIntoPlace;
383-
}
384-
sym::unaligned_volatile_store => {
385-
let dst = args[0].deref(self.cx());
386-
args[1].val.unaligned_volatile_store(self, dst);
387-
return IntrinsicResult::WroteIntoPlace;
388-
}
389379
sym::prefetch_read_data
390380
| sym::prefetch_write_data
391381
| sym::prefetch_read_instruction
@@ -484,7 +474,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc
484474
let tp_ty = fn_args.type_at(0);
485475
let layout = self.layout_of(tp_ty).layout;
486476
let _use_integer_compare = match layout.backend_repr() {
487-
Scalar(_) | ScalarPair(_, _) => true,
477+
Scalar(_) | ScalarPair { a: _, b: _, b_offset: _ } => true,
488478
SimdVector { .. } | SimdScalableVector { .. } => false,
489479
Memory { .. } => {
490480
// For rusty ABIs, small aggregates are actually passed

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